Model Based Estimation for Mixed Signal System A guide to design - - PowerPoint PPT Presentation

Model Based Estimation for Mixed Signal System Optimization

Sumit Adhikari and Jörg Kock System Architecture and Innovation BL Sensors, BU Automotive

A guide to design first time correct systems

Hamburg, Germany

2.

November 17, 2015

Overview:

Agenda

• Learning a top-down design methodology through which first time success

is possible

What will be told

• What to do in terms of methodology and design flow

What will be not told

• How to do (specially in connection to modelling and detailed design)

Assumption

• Everybody in my audience is a SystemC-AMS / COSIDE user
• I do not need to speak about the motivation of using it

GDSII

3.

November 17, 2015

What is I am going to talk in 20mins!

Requirement Analysis (SysML/UML/IBM-DOORS) Algorithm Design (C/C++/MATLAB) Business Case Maintenance Analog/RF Architecture (SystemC-AMS) Digital Architecture (SystemC) Software Architecture (C/C+) Requirements System Specification Acceptance Testing System Verification Circuit Design (Spice/Spectre) RTL Design (Verilog/VHDL) SW Development (C/C++) System Design Integration Validation Analog Layout Digital Layout Component Design Unit Testing Implementation

4.

November 17, 2015

Oscillator Voltage Regulator POR BG Processor ISS Memories Software HW Accelerator Peripheral Clock and Reset Management

The Problem You See As -

A D A D A D

The Problem You are Actually Dealing With!!

Gain bandwidth Adaptive ? Settling, jitter, duty cycle Supply ripple suppression , settling Slew rate Noise figure A D Filter type, coefficient Oscillator Voltage Regulator Settling Switch settling Offset Gain non- linearity Registers/ Addresses ? A D POR BG Processor family, memory hierarchy, Supply ripple suppression,

• utput voltage

behav, settling Supply saturation CMRR PSRR FIFO ? Processor IiSnSterrupt, WDT, cache? Continuous Refinement until best system is achieved mismatches Clock jitter loading A D Memories Size, type, speed Software Thermal noise HW Accelerator

5.

November 17, 2015

1/f noise Peripheral Bus bandwidth, delay Clock and Reset Management

Linearization, Calibration, Offset cancellation, mismatch analysis

Top down design refinement flow – Steps (1)

6.

November 17, 2015

 Algorithm Design

• Find the algorithm and all “algorithmic parameter” using

MATLAB.

 Architecture Level Design (Level I)

• Implement the architecture from algorithm in SystemC-AMS

+ SystemC

• Algorithm refinement using transfer functions, switches,

passives, accurate regulation loop, thermal noise, 1/f noise and non-idealities (small and large signal both).

• Co-simulate and optimize the architecture level design

Requirement Analysis (SysML/UML/IBM-DOORS) Algorithm Design (C/C++/MATLAB) Analog/RF Architecture (SystemC-AMS) Digital Architecture (SystemC) Software Architecture (C/C+) Circuit Design (Spice/Spectre) RTL Design (Verilog/VHDL) SW Development (C/C++) Analog Layout Digital Layout GDSII

Top down design refinement flow – Steps (7)

7.

November 17, 2015

 Design optimization and design centering (Level II)

• Talk to process team for passive components and model

them.

• Characterize closest possible available active components

and include characterized behavior in your model. Do not forget to fit temperature variations.

• Co-simulate and optimize the design for parameters

 Design for reliability and robustness (Level III)

• Perform 5 sigma Monte Carlo to prove the design.
• Apply extensive failure injection and analysis
• If MC or failure analysis fails, re-optimize system architecture

Analog/RF Architecture (SystemC-AMS) Circuit Design (Spice/Spectre) Analog Layout GDSII Requirement Analysis (SysML/UML/IBM-DOORS) Algorithm Design (C/C++/MATLAB) Digital Architecture (SystemC) RTL Design (Verilog/VHDL) Digital Layout Software Architecture (C/C+) SW Development (C/C++)

8.

November 17, 2015

Temperature Sensor, An Example – Algorithm (The MATLAB)

 The world of MATLAB ends here.  More you struggle with speed, less you analyze.  Focus more on full system design and optimization.  You are correct – you cannot reuse

• r extend what you did till now!

PTAT doubleTo s16 Data Fit Algorithm PTAT ADC Algorithm Data Fit Algorithm

9.

November 17, 2015

Quant CIC Data Fit Algorithm Vreg PTAT

Temperature Sensor, An Example – Architecture

(SystemC(-AMS) Starts Here)

Quantizer is clocked  Be careful about the characterization results you are getting

VSUP gm Oscillator

More complex than shown here  Delay the implementation phase as much as possible, get all analysis done here before the design starts.  Reuse is not always the very intriguing idea.  Do not over specify and do not let

• verdesign.

Get some feeling on modulator Internals!

• 10. November 17, 2015

sdmOut(logic) dacOut(Volts) intOut(Volts) 1.5 2 1 1 0.5 1.305 1.31 1.315 1.32 1.325 1.33 1.335 1.34 1.345 1.35 1.355 1.3 1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7 Time (Sec) 2

• 4

x 10 2 Time (Sec)

• 4

x 10

• 2

1.305 1.31 1.315 1.32 1.325 1.33 1.335 1.34 1.345 1.35 1.355

• 2

1.3 1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7 Time (Sec) 1

• 4

x 10 1 Time (Sec)

• 4

x 10 0.5 0.5 1.305 1.31 1.315 1.32 1.325 1.33 1.335 1.34 1.345 1.35 1.355 1.3 1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.7 Time (Sec)

 Effect of OPAMPs and Switches are clearly seen, and hold

• 4

x 10

check for track

Time (Sec)

• 4

x 10 sdmOut(logic) intOut(Volts) dacOut(Volts)

Sensor Behaviour and Algorithmic Error after Poly-Fit

Temperature Temperature

• 11. November 17, 2015

PTAT Error(%) Real vs Ideal PTAT Output Behaviour 1.4 0.12 Temperature Error after fitting 1.2 0.1 1 0.08 0.8 0.6 0.06 0.4 0.04 0.2 0.02

• 0.2

100 200 300 400 500 600 200 250 300 350 400 450 500 Output Voltage

Temperature Temperature

• 12. November 17, 2015

Error Output from System

Temperature Error in Percentage Temperature Error Plot 4.5 Temperature Error Plot 1 4 0.9 3.5 0.8 3 0.7 2.5 0.6 2 0.5 1.5 0.4 1 0.3 0.5 0.2

• 50

50 100 150 200 0.1

• 50

50 100 150 200 Temperature Error in Degrees

Error Output from System (In presence of power supply ripple)

• 13. November 17, 2015

PS Ripple 1MHz square wave

Temperature Error in Percentage 1.4 1.2 1 Temperature Error Plot 2 1.95 1.9 1.85 Temperature Error Plot 0.8 1.8 1.75 0.6 1.7 0.4 1.65 1.6 0.2 1.55

• 50

50 100 150 200 Temperature 1.5

• 50

50 100 150 200 Temperature

PS Ripple 1KHz square wave

Temperature Error in Percentage

• 14. November 17, 2015

Monte Carlo Simulation (Before and After Further Optimization)

Temperature Error in Percentage Monte Carlo of Temperature Error Plot with 5σ process variation 1.4 Monte Carlo of Temperature Error Plot with 5σ process variation 1 1.2 1 0.9 0.8 0.7 0.8 0.6 0.6 0.5 0.4 0.4 0.3 0.2 0.2 0.1 Temperature Error in Percentage

• 50

50 100 150 200

• 50

50 100 150 200 Temperature Temperature

COSIDE / SystemC-AMS Improvement Requests

• 15. November 17, 2015

COMPANY CONFIDENTIAL

• ELN MoC Improvements :
• ELN Noise sources (voltage & current),
• abstract ELN transfer functions and saturation elements (current & voltage),
• slew rate,
• temperature dependent ELN primitives
• temperature behaviour spec for abstracts.
• Pole Zero (Stability) analysis – Complex Plane notation should be fine.
• Multicore SystemC-AMS – analog solver for speed improvement

Summary and Conclusion

• 16. November 17, 2015

 We presented a flow using which

• Accurate DS can be extracted at earliest phase of development.
• Feasibility of the system, complete behavior of the system is well understood at the

earliest phase.

• Cost reduction using few architects instead of entire design team experimenting
• ver spins.
• No re spins due to lack of understanding.

 Outlook

• Engaging most of the activities during Architecture phase (using SystemC-AMS +

SystemC) is highly beneficial and the correct direction to follow.

• Additional COSIDE and/or SystemC-AMS features in the area of ELN MoCs and

Analysis appreciated to further improve our design flow

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