Outline Architecture and Properties Mode of Operation Measured Results Summary and Outlook Measurement Results of a Large Dynamic Range CSA - UMC 180 nm Process - P. Wieczorek, H. Flemming and H. Deppe GSI Helmholtzzentrum fuer Schwerionenforschung GmbH Experiment Electronics Department 06. November 2018 P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Mode of Operation Measured Results Summary and Outlook Outline Architecture and Properties 1 Mode of Operation 2 Measured Results 3 Summary and Outlook 4 P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Overview Mode of Operation Properties Measured Results Summary and Outlook Outline Architecture and Properties 1 Overview Properties Mode of Operation 2 Measured Results 3 Summary and Outlook 4 P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Overview Mode of Operation Properties Measured Results Summary and Outlook CSA SE2DIF INT Buffer Charge sensitive amplifier C0 CF1 R1 R3 input stage IN OUT+ C1 OUT− Switched feedback V ref R4 R2 C2 C3 capacitances architecture CF2 C4 Signal transformation: PO<4:1> LOG_D Ω single-end to differential C0 = 200 fF R1 = 50 k Vref = 0...1.8 V CAP_reset Capacitance set Logic Ω C1 = 4xC0 R2 = 50 k CF1 = 100 fF Ω PM<4:1> C2 = 16xC0 R3 = 50 k CF2 = 100 fF Ω C3 = 64xC0 R4 = 50 k Analogue filter and buffer at C4= 128xC0 the output P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Overview Mode of Operation Properties Measured Results Summary and Outlook Large dynamic range of > 10 5 Charge coverage: from noise level up to 45 pC Differential output voltage: 1V Active reset Automatic and manual mode to set feedback capacitances No. Unit Area Unit µm 2 C 0 200 fF 220 µm 2 C 1 4 × C 0 fF 880 µm 2 C 2 16 × C 0 fF 3523 µm 2 C 3 64 × C 0 fF 14080 µm 2 C 4 128 × C 0 fF 28160 P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Feedback Logic Mode of Operation Dynamic Capacitance Extension Measured Results Summary and Outlook Outline Architecture and Properties 1 Mode of Operation 2 Feedback Logic Dynamic Capacitance Extension Measured Results 3 Summary and Outlook 4 P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Feedback Logic Mode of Operation Dynamic Capacitance Extension Measured Results Summary and Outlook Manual mode: set fixed feedback capacitances to the amplifier Known feedback cap. PA<1> Signal IN configuration τ Threshold Chosen dynamic range is 1.25 V PA<2> mapped on 1V & τ Auto mode: dynamic extension of PA<3> & feedback capacitance τ PA<4> Each subrange is 1V & Additional readout of feedback configuration is necessary P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Feedback Logic Mode of Operation Dynamic Capacitance Extension Measured Results Summary and Outlook Measured transient during capacitance extension to the feedback is depicted Adding capacitance keeps the amplifier from saturation (up to 42pC) But: dynamic loss of 20% P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Dynamic Range Mode of Operation Gain Measured Results Noise Summary and Outlook Outline Architecture and Properties 1 Mode of Operation 2 Measured Results 3 Dynamic Range Gain Noise Summary and Outlook 4 P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Dynamic Range Mode of Operation Gain Measured Results Noise Summary and Outlook A-Mode C0 M-Mode C0 A-Mode C1 M-Mode C1 A-Mode C2 M-Mode C2 A-Mode C3 M-Mode C3 A-Mode C4 M-Mode C4 Ouput Voltage [mV] Ouput Voltage [mV] 1000 1000 100 100 100 1000 10000 100000 100 1000 10000 100000 Input Charge [fC] Input Charge [fC] Measured with auto mode Measured with manual mode Max. measured charge: up to 42pC Different slope for cap. C 1 in auto mode P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Dynamic Range Mode of Operation Gain Measured Results Noise Summary and Outlook Simulation Measured A Measured M 10 Sim. gain values Cal. gain values mV/fC mV/fC mV/fC Measured gain values Auto Measured gain values Manual 3.94 1.330 1.892 1 Gain mV/fC 0.855 0.922 0.818 0.205 0.255 0.253 0.1 0.0511 0.071 0.068 0.0185 0.028 0.028 0.01 0 1 2 3 4 5 6 No. of used Cf Gain for C 0 capacitance is about 3x lower as expected ⇒ influence of the RC - parasitic effects Optimization in next version P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Dynamic Range Mode of Operation Gain Measured Results Noise Summary and Outlook Summary of the noise calculation (compare: FEE Workshop 2018 at GSI) C T = C gs + C det + C f optimise parameter C T as small as possible ⇒ low noise contribution C det (detector capacitance): fixed C gs increases with the transistor geometry ⇒ trade off between transistor width and capacitance Feedback capacitance C f : ⇒ trade off between noise and dynamic range C gs =20 pF; C det =50 pF; C f =1 pF .... 30 pF ⇒ C T = 71...100 pF Measured CSA noise ( C 0 = 200 fF ) is σ > 0.38 fC P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Dynamic Range Mode of Operation Gain Measured Results Noise Summary and Outlook Following O’Conner a figure of merit (FOM) defined as FOM Preamp = Power × τ s Q max /σ Q Short peaking time of τ s = 20 ns Measured noise of σ Q = 0 . 4 fC Large dynamic range of >100 000 Present design: FOM = 2fJ (excellent result) P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Summary Mode of Operation Outlook Measured Results Noise Calc. Backup Summary and Outlook Outline Architecture and Properties 1 Mode of Operation 2 Measured Results 3 Summary and Outlook 4 Summary Outlook P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Summary Mode of Operation Outlook Measured Results Noise Calc. Backup Summary and Outlook First Prototype works excellent Optimize in the next version: Gain in the initial state (with cap. C 0) Noise: blocking of voltage references Active filter in the feedback of the output stage Resistance of the capacitance switches P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Summary Mode of Operation Outlook Measured Results Noise Calc. Backup Summary and Outlook First customer is beam diagnostics for the readout of the SEM - grids A 4 channel prototyp is submitted in summer 2018 P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Summary Mode of Operation Outlook Measured Results Noise Calc. Backup Summary and Outlook Noise calculations for the input transistor as dominant noise source C 2 th [ e 2 ] = 10 · k B · T ENC 2 T (1) 8 · q 2 � τ s · ( k x · W / L · I ds ) C 2 4 · K f ENC 2 1 / f [ e 2 ] = T (2) C 2 ox · q 2 W · L DET [ e 2 ] = 2 ENC 2 q · I det · τ s (3) ENC 2 tot = ENC 2 th + ENC 2 1 / f + ENC 2 (4) DET P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Summary Mode of Operation Outlook Measured Results Noise Calc. Backup Summary and Outlook Optimise transistor parameter W / L and I ds Input transistor ratio W / L high ⇒ large input capacitance Current through input transistor large ⇒ high power consump. ENC Calculation 8000 f(x,y) 7000 6000 5000 8000 7000 4000 6000 ENC [e-] 3000 5000 4000 2000 3000 1000 2000 0 1000 0 1 10 1e-06 1e-05 100 0.0001 Transistor W [ µ m] 0.001 1000 0.01 Input Transistor Current [A] 0.1 1 10000 P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Summary Mode of Operation Outlook Measured Results Noise Calc. Backup Summary and Outlook 3400 Calc. Noise f(x)=a*x+b 3200 3000 2800 ENC T [e-] 2600 2400 2200 2000 1800 0 10 20 30 40 50 Capacitance C f [pF] Small capacitance for small signals ⇒ better SNR P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Summary Mode of Operation Outlook Measured Results Noise Calc. Backup Summary and Outlook Layout input transistor with W / L : 35 556 (256 × 25 / 0 . 18) Input transistor area on chip: 330 µ m × 95 µ m P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
Outline Architecture and Properties Summary Mode of Operation Outlook Measured Results Noise Calc. Backup Summary and Outlook CSA based on folded cascode architecture V bp MP1 No. Current (TT ; SS ; FF) Unit I g I 2 V k I g 3.1 ; 2.6 ; 3.81 mA I 1 2.6 ; 2.2 ; 3.25 mA V bc MP3 I 1 I 2 0.5 ; 0.4 ; 0.55 mA V out V in V bn MN2 MN4 MN2 MP1 MP3 MN4 Unit Number 256 20 10 8 1 W 25 15 60 2.5 µ m L 0.18 1 0.5 1.5 µ m I ds (TT) 2.6 3.1 0.5 0.5 mA P. Wieczorek, H. Flemming and H. Deppe Experiment Electronics
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