Low Harmonic Rectifier Modeling and Control 18.1 Modeling losses - - PowerPoint PPT Presentation

low harmonic rectifier modeling and control
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Low Harmonic Rectifier Modeling and Control 18.1 Modeling losses - - PowerPoint PPT Presentation

Chapter 18 Low Harmonic Rectifier Modeling and Control 18.1 Modeling losses and efficiency in CCM high-quality rectifiers Expression for controller duty cycle d ( t ) Expression for the dc load current Solution for converter efficiency


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Chapter 18: Low harmonic rectifier modeling and control

Chapter 18

Low Harmonic Rectifier Modeling and Control

18.1 Modeling losses and efficiency in CCM high-quality rectifiers Expression for controller duty cycle d(t) Expression for the dc load current Solution for converter efficiency η Design example 18.2 Controller schemes Average current control Feedforward Current programmed control Hysteretic control Nonlinear carrier control 18.3 Control system modeling Modeling the outer low-bandwidth control system Modeling the inner wide-bandwidth average current controller

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Chapter 18: Low harmonic rectifier modeling and control

18.1 Modeling losses and efficiency in CCM high-quality rectifiers

Objective: extend procedure of Chapter 3, to predict the output voltage, duty cycle variations, and efficiency, of PWM CCM low harmonic rectifiers. Approach: Use the models developed in Chapter 3. Integrate over

  • ne ac line cycle to determine steady-state waveforms and average

power. Boost example

+ – Q1 L C R + v(t) – D1 vg(t) ig(t) RL i(t) + – R + v(t) – vg(t) ig(t) RL i(t) DRon + – D' : 1 VF

Dc-dc boost converter circuit Averaged dc model

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Modeling the ac-dc boost rectifier

R vac(t) iac(t) + vg(t) – ig(t) + v(t) – id(t) Q1 L C D1 controller i(t) RL

+ – R + v(t) = V – vg(t) ig(t) RL i(t) = I d(t) Ron + – d'(t) : 1 VF id(t) C

(large)

Boost rectifier circuit Averaged model

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Boost rectifier waveforms

2 4 6 8 10 100 200 300

vg(t) vg(t) ig(t) ig(t)

0° 30° 60° 90° 120° 150° 180°

d(t)

0.2 0.4 0.6 0.8 1 0° 30° 60° 90° 120° 150° 180° 1 2 3 4 5 6

id(t) i(t) = I ωt

0° 30° 60° 90° 120° 150° 180°

Typical waveforms (low frequency components) ig(t) = vg(t) Re

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Example: boost rectifier with MOSFET on-resistance

+ – R + v(t) = V – vg(t) ig(t) i(t) = I d(t) Ron d'(t) : 1 id(t) C

(large)

Averaged model Inductor dynamics are neglected, a good approximation when the ac line variations are slow compared to the converter natural frequencies

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18.1.1 Expression for controller duty cycle d(t)

+ – R + v(t) = V – vg(t) ig(t) i(t) = I d(t) Ron d'(t) : 1 id(t) C

(large)

Solve input side of model: ig(t)d(t)Ron = vg(t) – d'(t)v with ig(t) = vg(t) Re eliminate ig(t):

vg(t) Re d(t)Ron = vg(t) – d'(t)v

vg(t) = VM sin ωt

solve for d(t):

d(t) = v – vg(t) v – vg(t) Ron Re

Again, these expressions neglect converter dynamics, and assume that the converter always operates in CCM.

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18.1.2 Expression for the dc load current

+ – R + v(t) = V – vg(t) ig(t) i(t) = I d(t) Ron d'(t) : 1 id(t) C

(large)

Solve output side of model, using charge balance on capacitor C: I = id

Tac

id(t) = d'(t)ig(t) = d'(t) vg(t) Re

Butd’(t) is:

d'(t) = vg(t) 1 – Ron Re v – vg(t) Ron Re

hence id(t) can be expressed as

id(t) = vg

2(t)

Re 1 – Ron Re v – vg(t) Ron Re

Next, average id(t) over an ac line period, to find the dc load current I.

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Dc load current I

I = id

Tac = 2

Tac V M

2

Re 1 – Ron Re sin2 ωt v – VMRon Re sin ωt dt

Tac/2

Now substitute vg (t) = VM sin ωt, and integrate to find 〈id(t)〉Tac: This can be written in the normalized form I = 2 Tac V M

2

VRe 1 – Ron Re sin2 ωt 1 – a sin ωt dt

Tac/2

with

a = VM V Ron Re

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Integration

By waveform symmetry, we need only integrate from 0 to Tac/4. Also, make the substitution θ = ωt:

I = V M

2

VRe 1 – Ron Re 2 π sin2 θ 1 – a sin θ dθ

π/2

This integral is obtained not only in the boost rectifier, but also in the buck-boost and other rectifier topologies. The solution is

4 π sin2 θ 1 – a sin θ dθ

π/2

= F(a) = 2 a2π – 2a – π + 4 sin– 1 a + 2 cos– 1 a 1 – a2

  • Result is in closed form
  • a is a measure of the loss

resistance relative to Re

  • a is typically much smaller than

unity

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The integral F(a)

F(a) a

–0.15 –0.10 –0.05 0.00 0.05 0.10 0.15 0.85 0.9 0.95 1 1.05 1.1 1.15

4 π sin2 θ 1 – a sin θ dθ

π/2

= F(a) = 2 a2π – 2a – π + 4 sin– 1 a + 2 cos– 1 a 1 – a2

F(a) ≈ 1 + 0.862a + 0.78a2 Approximation via polynomial: For | a | ≤ 0.15, this approximate expression is within 0.1% of the exact

  • value. If the a2 term is
  • mitted, then the accuracy

drops to ±2% for | a | ≤ 0.15. The accuracy of F(a) coincides with the accuracy

  • f the rectifier efficiency η.
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18.1.4 Solution for converter efficiency η

Converter average input power is

Pin = pin(t)

Tac = V M 2

2Re

Average load power is

Pout = VI = V V M

2

VRe 1 – Ron Re F(a) 2

with

a = VM V Ron Re

So the efficiency is

η = Pout Pin = 1 – Ron Re F(a)

Polynomial approximation:

η ≈ 1 – Ron Re 1 + 0.862 VM V Ron Re + 0.78 VM V Ron Re

2

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Boost rectifier efficiency

η = Pout Pin = 1 – Ron Re F(a)

0.0 0.2 0.4 0.6 0.8 1.0 0.75 0.8 0.85 0.9 0.95 1

VM/V η

R

  • n

/R

e

= 0.05 Ron/Re = 0.1 Ron/Re = 0.15 R

  • n

/ R

e

= . 2

  • To obtain high

efficiency, choose V slightly larger than VM

  • Efficiencies in the range

90% to 95% can then be

  • btained, even with Ron

as high as 0.2Re

  • Losses other than

MOSFET on-resistance are not included here

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18.1.5 Design example

Let us design for a given efficiency. Consider the following specifications: Output voltage 390 V Output power 500 W rms input voltage 120 V Efficiency 95% Assume that losses other than the MOSFET conduction loss are negligible. Average input power is

Pin = Pout η = 500 W 0.95 = 526 W

Then the emulated resistance is

Re = V g, rms

2

Pin = (120 V)2 526 W = 27.4 Ω

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Design example

Also,

VM V = 120 2 V 390 V = 0.435

0.0 0.2 0.4 0.6 0.8 1.0 0.75 0.8 0.85 0.9 0.95 1

VM/V η

R

  • n

/R

e

= 0.05 Ron/Re = 0.1 Ron/Re = 0.15 R

  • n

/ R

e

= . 2

95% efficiency with VM/V = 0.435 occurs with Ron/Re ≈ 0.075. So we require a MOSFET with on resistance of Ron ≤ (0.075) Re = (0.075) (27.4 Ω) = 2 Ω

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18.2 Controller schemes

Average current control Feedforward Current programmed control Hysteretic control Nonlinear carrier control

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18.2.1 Average current control

+ – + v(t) – vg(t) ig(t) Gate driver Pulse width modulator Compensator Gc(s)

+ – + –

Current reference vr(t) va(t) ≈ Rs 〈 ig(t)〉Ts L

Boost example Low frequency (average) component

  • f input current is

controlled to follow input voltage

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Use of multiplier to control average power

+ – + v(t) – vg(t) ig(t) Gate driver Pulse width modulator Compensator Gc(s)

+ – + –

vref1(t) kx xy x y Multiplier vg(t) vcontrol(t) Gcv(s)

+ –

Voltage reference C vref2(t) v(t) verr(t) va(t)

Pav = V g,rms

2

Re = Pload

As discussed in Chapter 17, an output voltage feedback loop adjusts the emulated resistance Re such that the rectifier power equals the dc load power: An analog multiplier introduces the dependence of Re

  • n v(t).
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18.2.2 Feedforward

+ – + v(t) – vg(t) ig(t) Gate driver Pulse width modulator Compensator Gc(s)

+ – + –

vref1(t) x y multiplier vg(t) vcontrol(t) Gcv(s)

+ –

Voltage reference k v xy z2 z Peak detector VM vref2(t) va(t)

Feedforward is sometimes used to cancel out disturbances in the input voltage vg(t). To maintain a given power throughput Pav, the reference voltage vref1(t) should be

vref1(t) = Pavvg(t)Rs V g,rms

2

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Feedforward, continued

+ – + v(t) – vg(t) ig(t) Gate driver Pulse width modulator Compensator Gc(s)

+ – + –

vref1(t) x y multiplier vg(t) vcontrol(t) Gcv(s)

+ –

Voltage reference k v xy z2 z Peak detector VM vref2(t) va(t)

vref1(t) = k vvcontrol(t)vg(t) V M

2

Pav = k vvcontrol(t) 2Rs

Controller with feedforward produces the following reference: The average power is then given by

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18.2.3 Current programmed control

Boost converter Current-programmed controller R vg(t) ig(t) is(t) vg(t) + v(t) – i2(t) Q1 L C D1 vcontrol(t)

Multiplier

X ic(t) = kx vg(t) vcontrol(t) + – + +

+ –

Comparator Latch

ia(t)

Ts

S R Q

ma

Clock

Current programmed control is a natural approach to obtain input resistor emulation: Peak transistor current is programmed to follow input voltage. Peak transistor current differs from average inductor current, because of inductor current ripple and artificial ramp. This leads to significant input current waveform distortion.

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CPM boost converter: Static input characteristics

ig(t)

Ts =

vg(t) Lic

2(t)fs

V – vg(t) vg(t) V + maL V in DCM ic(t) + maT s vg(t) V – 1 + vg

2(t)Ts

2LV in CCM

Mode boundary: CCM occurs when

ig(t)

Ts > TsV

2L vg(t) V 1 – vg(t) V

  • r,

ic(t) > TsV L maL V + vg(t) V 1 – vg(t) V It is desired that ic(t) = vg(t) Re

0.2 0.4 0.6 0.8 1 0.0 0.2 0.4 0.6 0.8 1.0

vg(t) V jg(t) = ig(t) Ts Rbase V

CCM DCM Re = Rbase R

e

= 4R

b a s e

Re = . 3 3 Rbase Re = 0.5Rbase Re = 2Rbase Re = 0.2Rbase Re = . 1 Rbase

R

e

= 1 Rb

a s e

ma = V 2L Rbase = 2L Ts

Static input characteristics of CPM boost, with minimum slope compensation: Minimum slope compensation:

ma = V 2L

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18.3 Control system modeling

  • f high quality rectifiers

Two loops: Outer low-bandwidth controller Inner wide-bandwidth controller

Boost converter Wide-bandwidth input current controller vac(t) iac(t) + vg(t) – ig(t) ig(t) vg(t) + vC(t) – i2(t) Q1 L C D1 vcontrol(t)

Multiplier

X +– vref1(t) = kxvg(t)vcontrol(t) Rs va(t) Gc(s) PWM

Compensator

verr(t) DC–DC Converter Load + v(t) – i(t) d(t) +– Compensator and modulator vref3 Wide-bandwidth output voltage controller +– Compensator vref2 Low-bandwidth energy-storage capacitor voltage controller vC(t) v(t)

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18.3.1 Modeling the outer low-bandwidth control system

This loop maintains power balance, stabilizing the rectifier output voltage against variations in load power, ac line voltage, and component values The loop must be slow, to avoid introducing variations in Re at the harmonics of the ac line frequency Objective of our modeling efforts: low-frequency small-signal model that predicts transfer functions at frequencies below the ac line frequency

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Large signal model

averaged over switching period Ts

Re(vcontrol) 〈 vg(t)〉Ts vcontrol + – Ideal rectifier (LFR) ac input dc

  • utput

+ – 〈 ig(t)〉Ts 〈 p(t)〉Ts 〈 i2(t)〉Ts 〈 v(t)〉Ts C Load

Ideal rectifier model, assuming that inner wide-bandwidth loop

  • perates ideally

High-frequency switching harmonics are removed via averaging Ac line-frequency harmonics are included in model Nonlinear and time-varying

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Predictions of large-signal model

Re(vcontrol) 〈 vg(t)〉Ts vcontrol + – Ideal rectifier (LFR) ac input dc

  • utput

+ – 〈 ig(t)〉Ts 〈 p(t)〉Ts 〈 i2(t)〉Ts 〈 v(t)〉Ts C Load

vg(t) = 2 vg,rms sin ωt

If the input voltage is Then the instantaneous power is:

p(t)

Ts =

vg(t)

Ts 2

Re(vcontrol(t)) = vg,rms

2

Re(vcontrol(t)) 1 – cos 2ωt

which contains a constant term plus a second- harmonic term

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Separation of power source into its constant and time-varying components

+ – 〈 i2(t)〉Ts 〈 v(t)〉Ts C Load V g,rms

2

Re – V g,rms

2

Re cos2 2ωt Rectifier output port

The second-harmonic variation in power leads to second-harmonic variations in the output voltage and current

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Removal of even harmonics via averaging

t v(t) 〈 v(t)〉T2L 〈 v(t)〉Ts

T2L = 1

2 2π

ω = π ω

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Resulting averaged model

+ – 〈 i2(t)〉T2L 〈 v(t)〉T2L C Load V g,rms

2

Re Rectifier output port

Time invariant model Power source is nonlinear

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Perturbation and linearization

v(t)

T2L = V + v(t)

i2(t)

T2L = I2 + i2(t)

vg,rms = Vg,rms + vg,rms(t) vcontrol(t) = Vcontrol + vcontrol(t)

V >> v(t) I2 >> i2(t) Vg,rms >> vg,rms(t) Vcontrol >> vcontrol(t)

Let with The averaged model predicts that the rectifier output current is

i2(t)

T2L =

p(t)

T2L

v(t)

T2L

= vg,rms

2

(t) Re(vcontrol(t)) v(t)

T2L

= f vg,rms(t), v(t)

T2L, vcontrol(t))

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Linearized result

I2 + i2(t) = g2vg,rms(t) + j2v(t) – vcontrol(t) r2

g2 = df vg,rms, V, Vcontrol) dvg,rms

vg,rms = Vg,rms

= 2 Re(Vcontrol) Vg,rms V where – 1 r2 = df Vg,rms, v

T2L, Vcontrol)

d v

T2L v T2L = V

= – I2 V j2 = df Vg,rms, V, vcontrol) dvcontrol

vcontrol = Vcontrol

= – V g,rms

2

VRe

2(Vcontrol)

dRe(vcontrol) dvcontrol

vcontrol = Vcontrol

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Small-signal equivalent circuit

C Rectifier output port r2 g2 vg,rms j2 vcontrol R i2 + – v

v(s) vcontrol(s) = j2 R||r2 1 1 + sC R||r2 v(s) vg,rms(s) = g2 R||r2 1 1 + sC R||r2

Predicted transfer functions Control-to-output Line-to-output

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Model parameters

Table 18. 1 Small-signal model parameters for several types of rectifier control schemes Controller type g2 j2 r

2

Average current control with feedforward, Fig. 18.9 Pav VVcontrol V 2 Pav Current-programmed control,

  • Fig. 18.10

2Pav VVg,rms Pav VVcontrol V 2 Pav Nonlinear-carrier charge control

  • f boost rectifier, Fig. 18.14

2Pav VVg,rms Pav VVcontrol V 2 2Pav Boost with hysteretic control,

  • Fig. 18.13(b)

2Pav VVg,rms Pav VTon V 2 Pav DCM buck–boost, flyback, SEPIC, or Cuk converters 2Pav VVg,rms 2Pav VD V 2 Pav

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Constant power load

vac(t) iac(t) Re + – Ideal rectifier (LFR) C i2(t) ig(t) vg(t) i(t) load + v(t) –

pload(t) = VI = Pload

Energy storage capacitor vC(t) + – Dc-dc converter + – Pload V 〈 pac(t)〉Ts

Rectifier and dc-dc converter operate with same average power Incremental resistance R of constant power load is negative, and is

R = – V 2 Pav

which is equal in magnitude and opposite in polarity to rectifier incremental output resistance r2 for all controllers except NLC

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Transfer functions with constant power load

v(s) vcontrol(s) = j2 sC

v(s) vg,rms(s) = g2 sC

When r2 = –R, the parallel combination r2 || R becomes equal to zero. The small-signal transfer functions then reduce to

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18.3.2 Modeling the inner wide-bandwidth average current controller

+ – + – L C R + 〈v(t)〉Ts – 〈vg(t)〉Ts 〈v1(t)〉Ts 〈i2(t)〉Ts 〈i(t)〉Ts + 〈v2(t)〉Ts – 〈i1(t)〉Ts Averaged switch network

Averaged (but not linearized) boost converter model, Fig. 7.42:

vg(t)

Ts = Vg + vg(t)

d(t) = D + d(t) ⇒ d'(t) = D' – d(t) i(t)

Ts = i1(t) Ts = I + i(t)

v(t)

Ts = v2(t) Ts = V + v(t)

v1(t)

Ts = V1 + v1(t)

i2(t)

Ts = I2 + i2(t)

In Chapter 7, we perturbed and linearized using the assumptions Problem: variations in vg, i1 , and d are not small. So we are faced with the design of a control system that exhibits significant nonlinear time-varying behavior.

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Linearizing the equations of the boost rectifier

When the rectifier operates near steady-state, it is true that

v(t)

Ts = V + v(t)

with

v(t) << V

In the special case of the boost rectifier, this is sufficient to linearize the equations of the average current controller. The boost converter average inductor voltage is

L d ig(t)

Ts

dt = vg(t)

Ts – d'(t)V – d'(t)v(t)

substitute:

L d ig(t)

Ts

dt = vg(t)

Ts – d'(t)V – d'(t)v(t)

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Linearized boost rectifier model

L d ig(t)

Ts

dt = vg(t)

Ts – d'(t)V – d'(t)v(t)

The nonlinear term is much smaller than the linear ac term. Hence, it can be discarded to obtain

L d ig(t)

Ts

dt = vg(t)

Ts – d'(t)V

Equivalent circuit:

+ – L + – d'(t)V vg(t) Ts ig(t) Ts

ig(s) d(s) = V sL

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The quasi-static approximation

The above approach is not sufficient to linearize the equations needed to design the rectifier averaged current controllers of buck-boost, Cuk, SEPIC, and other converter topologies. These are truly nonlinear time- varying systems. An approximate approach that is sometimes used in these cases: the quasi-static approximation Assume that the ac line variations are much slower than the converter dynamics, so that the rectifier always operates near equilibrium. The quiescent operating point changes slowly along the input sinusoid, and we can find the slowly-varying “equilibrium” duty ratio as in Section 18.1. The converter small-signal transfer functions derived in Chapters 7 and 8 are evaluated, using the time-varying operating point. The poles, zeroes, and gains vary slowly as the operating point varies. An average current controller is designed, that has a positive phase margin at each operating point.

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Quasi-static approximation: discussion

In the literature, several authors have reported success using this method Should be valid provided that the converter dynamics are suffieiently fast, such that the converter always operates near the assumed

  • perating points

No good condition on system parameters, which can justify the approximation, is presently known for the basic converter topologies It is well-understood in the field of control systems that, when the converter dynamics are not sufficiently fast, then the quasi-static approximation yields neither necessary nor sufficient conditions for

  • stability. Such behavior can be observed in rectifier systems. Worst-

case analysis to prove stability should employ simulations.