Introduction To MCS-51 By Charoen Vongchumyen Department of - - PowerPoint PPT Presentation

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Introduction To MCS-51 By Charoen Vongchumyen Department of - - PowerPoint PPT Presentation

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Introduction To MCS-51 By Charoen Vongchumyen Department of Computer Engineering Faculty of Engineering KMITLadkrabang 8051 Hardware Basic 8051 Hardware Basic Content Content Overview Overview Architechture

slide-1
SLIDE 1

Introduction To MCS-51

By

Charoen Vongchumyen

  • Department of Computer Engineering
  • Faculty of Engineering
  • KMITLadkrabang
slide-2
SLIDE 2

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Hardware Basic 8051 Hardware Basic

Content Content

  • Overview

Overview

  • Architechture

Architechture

  • Memory map

Memory map

  • Register

Register

  • Interrupt

Interrupt

  • Timer/Counter

Timer/Counter

  • Serial communication

Serial communication

slide-3
SLIDE 3

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Overview 8051 Overview

What is 8051? What is 8051?

  • 8051 is a famous

8051 is a famous microcontroller microcontroller series from Intel series from Intel

  • 8 bit architecture and instruction set

8 bit architecture and instruction set

  • Easy to use and learning

Easy to use and learning

  • Widely use in many application

Widely use in many application

  • Suitable for Embedded and Controller application

Suitable for Embedded and Controller application

slide-4
SLIDE 4

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Feature 8051 Feature

  • 8 Bit architecture

8 Bit architecture

  • Up to 64KB of external code and data

Up to 64KB of external code and data

  • 4KB of internal code, EPROM (8751), ROM (8051), Flash (8951)

4KB of internal code, EPROM (8751), ROM (8051), Flash (8951)

  • 128 Bytes of internal RAM

128 Bytes of internal RAM

  • 32 bits

32 bits inport inport/output port /output port

  • 2 Timer/Counter

2 Timer/Counter

  • 1 Serial communication (Full Duplex)

1 Serial communication (Full Duplex)

  • 6 Sources of interrupt

6 Sources of interrupt

slide-5
SLIDE 5

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Series 8051 Series

slide-6
SLIDE 6

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Series 8051 Series

slide-7
SLIDE 7

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Pin 8051 Pin

Port 0 Port 0

Data and Address bus / Port

Data and Address bus / Port Port 1 Port 1

Bidirectional

Bidirectional port port Port 2 Port 2

Address bus / Port

Address bus / Port Port 3 Port 3

Alternate Function / Port

Alternate Function / Port ALE ALE

Address latch enable

Address latch enable EA\ EA\

External memory access

External memory access RST RST

Reset

Reset PSEN\ PSEN\

Program strobe enable

Program strobe enable XTAL1,2 XTAL1,2

Crystal in/out

Crystal in/out

slide-8
SLIDE 8

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Architecture 8051 Architecture

slide-9
SLIDE 9

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Ports 8051 Ports

slide-10
SLIDE 10

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Ports 8051 Ports

slide-11
SLIDE 11

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Ports 8051 Ports

slide-12
SLIDE 12

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Ports 8051 Ports

slide-13
SLIDE 13

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Machine Cycles 8051 Machine Cycles

Clock Clock

State 1 State 1 S1 S1 State 2 State 2 S2 S2 State 3 State 3 S3 S3 State 4 State 4 S4 S4 State 5 State 5 S5 S5 State 6 State 6 S6 S6 P1 P1 P2 P2 P1 P1 P2 P2 P1 P1 P2 P2 P1 P1 P2 P2 P1 P1 P2 P2 P1 P1 P2 P2

ALE ALE S1 S1 S2 S2 S3 S3 S4 S4 S5 S5 S6 S6

Fetch Fetch Opcode Opcode Fetch Fetch Opcode Opcode

slide-14
SLIDE 14

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 8051 Machince Machince Cycles Cycles (

(Con Con

t

t) )

T = ( C * 12 ) / CF T = ( C * 12 ) / CF

C = Machine Cycle of C = Machine Cycle of instrution instrution CF = Crystal Frequency CF = Crystal Frequency

Such as Such as ADD A,R1 ADD A,R1

  • > use 1 Machine Cycle
  • > use 1 Machine Cycle

XTAL 12 MHz XTAL 12 MHz

  • > use 1
  • > use 1 uSec

uSec XTAL 16 MHz XTAL 16 MHz

  • > use 0.75
  • > use 0.75 uSec

uSec

Note* Sometime we use XTAL 11.0592 Note* Sometime we use XTAL 11.0592

  • f
  • f

serial communication serial communication

slide-15
SLIDE 15

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Memory 8051 Memory

Code Memory Code Memory

  • External Code memory

External Code memory 0000 - 0000 - FFFFh FFFFh

  • Internal Code memory

Internal Code memory 0000 - 0FFFh 0000 - 0FFFh

Data Memory Data Memory

  • External Data memory

External Data memory 0000 - 0000 - FFFFh FFFFh

  • Internal Data memory

Internal Data memory

? ? Register Bank

Register Bank 00 - 1Fh 00 - 1Fh

? ? Bit addressable

Bit addressable 20h - 2Fh 20h - 2Fh

? ? Byte addressable

Byte addressable 30h - 7Fh 30h - 7Fh

? ? Special function register

Special function register 80h - 7Fh 80h - 7Fh

slide-16
SLIDE 16

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Code Memory 8051 Code Memory

External code memory External code memory Internal code Internal code EA\ = 1 EA\ = 1 External code External code EA\ = 0 EA\ = 0 0000h 0FFFh 1000h FFFFh

slide-17
SLIDE 17

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 External Code Fetches 8051 External Code Fetches

slide-18
SLIDE 18

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Data Memory 8051 Data Memory

External Data External Data Memory Memory Internal Data Internal Data RAM RAM Special Function Special Function Register Register Overlab Overlab Memory Memory

7Fh 80h FFh 0000 FFFFh

slide-19
SLIDE 19

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Internal Data Memory 8051 Internal Data Memory

Bank 0 Bank 0 Bank 1 Bank 1 Bank 2 Bank 2 Bank 3 Bank 3 Bit Addressable Bit Addressable RAM RAM Byte Addressable Byte Addressable RAM RAM

8h 8h 10h 10h 18h 18h 20h 20h 20h 20h

Special Function Special Function Register Register

80h 80h FFh FFh 7Fh 7Fh

Extend RAM Extend RAM Access by Access by Indirect addressing Indirect addressing

  • nly
  • nly

FFh FFh 80h 80h

slide-20
SLIDE 20

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Register Bank 8051 Register Bank

R0 R0 R1 R1 R2 R2 R3 R3 R4 R4 R5 R5 R6 R6 R7 R7

Bank 0 Bank 0 Bank 1 Bank 1 Bank 2 Bank 2 Bank 3 Bank 3 08h - 0Fh 08h - 0Fh 10h - 17h 10h - 17h 18h - 1Fh 18h - 1Fh 00h - 07h 00h - 07h

Bank 0 -> RS0, 1 = 00 Bank 0 -> RS0, 1 = 00 Bank 1 -> RS0, 1 = 01 Bank 1 -> RS0, 1 = 01 Bank 2 -> RS0, 1 = 10 Bank 2 -> RS0, 1 = 10 Bank 3 -> RS0, 1 = 11 Bank 3 -> RS0, 1 = 11 All bank has same name of register All bank has same name of register R0 R0 R1 R1 R2 R2 R3 R3 R4 R4 R5 R5 R6 R6 R7 R7 R0 R0 R1 R1 R2 R2 R3 R3 R4 R4 R5 R5 R6 R6 R7 R7 R0 R0 R1 R1 R2 R2 R3 R3 R4 R4 R5 R5 R6 R6 R7 R7

slide-21
SLIDE 21

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 Bit Addressable RAM 8051 Bit Addressable RAM

00 01 02 03 04 05 06 07 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 10 11 12 13 14 15 16 17 20 21 22 23 24 25 26 27 20 21 22 23 24 25 26 27 30 31 32 33 34 35 36 37 30 31 32 33 34 35 36 37 18 19 1A 1B 1C 1D 1E 1F 18 19 1A 1B 1C 1D 1E 1F 28 29 2A 2B 2C 2D 2E 2F 28 29 2A 2B 2C 2D 2E 2F 38 39 3A 3B 3C 3D 3E 3F 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 50 51 52 53 54 55 56 57 60 61 62 63 64 65 66 67 60 61 62 63 64 65 66 67 70 71 72 73 74 75 76 77 70 71 72 73 74 75 76 77 58 59 5A 5B 5C 5D 5E 5F 58 59 5A 5B 5C 5D 5E 5F 68 69 6A 6B 66 6D 6E 6F 68 69 6A 6B 66 6D 6E 6F 78 79 7A 7B 7C 7D 7E 7F 78 79 7A 7B 7C 7D 7E 7F 21h 21h 23h 23h 25h 25h 27h 27h 29h 29h 2Bh 2Bh 2Dh 2Dh 2Fh 2Fh 20h 20h 22h 22h 24h 24h 26h 26h 28h 28h 2Ah 2Ah 2Ch 2Ch 2Eh 2Eh

Bit addressable Bit addressable Byte addressable Byte addressable

slide-22
SLIDE 22

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 8051 SFR SFR

( ) In 8052 Only

slide-23
SLIDE 23

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 8051 SFR SFR (

(con con

t

t) )

  • P0 (Port 0, Address 80h, Bit-Addressable)

P0 (Port 0, Address 80h, Bit-Addressable)

  • P1 (Port 1, Address 90h, Bit-Addressable)

P1 (Port 1, Address 90h, Bit-Addressable)

  • P2 (Port 2, Address A0h, Bit-Addressable)

P2 (Port 2, Address A0h, Bit-Addressable)

  • P3 (Port 3, Address B0h, Bit-Addressable)

P3 (Port 3, Address B0h, Bit-Addressable)

  • ACC (Accumulator, Addresses E0h, Bit-Addressable)

ACC (Accumulator, Addresses E0h, Bit-Addressable)

  • B (B Register, Addresses F0h, Bit-Addressable)

B (B Register, Addresses F0h, Bit-Addressable)

  • SP (Stack Pointer, Address 81h)

SP (Stack Pointer, Address 81h)

  • DPL/DPH (Data Pointer Low/High, Addresses 82h/83h)

DPL/DPH (Data Pointer Low/High, Addresses 82h/83h)

  • TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Bh)

TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Bh)

  • TL1/TH1 (Timer 1 Low/High, Addresses 8Ch/8Dh)

TL1/TH1 (Timer 1 Low/High, Addresses 8Ch/8Dh)

  • SBUF (Serial Control, Addresses 99h)

SBUF (Serial Control, Addresses 99h)

slide-24
SLIDE 24

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

8051 8051 SFR SFR (

(con con

t

t) )

  • PSW (Program Status Word, Addresses D0h, Bit-Addressable)

PSW (Program Status Word, Addresses D0h, Bit-Addressable)

  • PCON (Power Control, Addresses 87h)

PCON (Power Control, Addresses 87h)

  • TCON (Timer Control, Addresses 88h, Bit-Addressable)

TCON (Timer Control, Addresses 88h, Bit-Addressable)

  • TMOD (Timer Mode, Addresses 89h)

TMOD (Timer Mode, Addresses 89h)

  • SCON (Serial Control, Addresses 98h, Bit-Addressable)

SCON (Serial Control, Addresses 98h, Bit-Addressable)

  • IE (Interrupt Enable, Addresses A8h)

IE (Interrupt Enable, Addresses A8h)

  • IP (Interrupt Priority, Addresses B8h, Bit-Addressable)

IP (Interrupt Priority, Addresses B8h, Bit-Addressable)

slide-25
SLIDE 25

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

Program Status Word (PSW) Program Status Word (PSW)

slide-26
SLIDE 26

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

Power Control (PCON) Power Control (PCON)

slide-27
SLIDE 27

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

Timer Control (TCON) Timer Control (TCON)

slide-28
SLIDE 28

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

Timer Mode (TMOD) Timer Mode (TMOD)

slide-29
SLIDE 29

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

Serial Control (SCON) Serial Control (SCON)

slide-30
SLIDE 30

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

Interrupt Enable (IE) Interrupt Enable (IE)

slide-31
SLIDE 31

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Hardware Basic 8051 Hardware Basic

Interrupt Priority (IP) Interrupt Priority (IP)

slide-32
SLIDE 32

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

8051 Software Basic 8051 Software Basic

  • Register and memory

Register and memory

  • Addressing mode

Addressing mode

  • Instructionset

Instructionset

  • Arithmetic

Arithmetic

  • Logical

Logical

  • Boolean

Boolean

  • Data transfer

Data transfer

  • Program control flow

Program control flow

slide-33
SLIDE 33

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

8051 Register & Memory 8051 Register & Memory

Register Register

  • R0

R0

R7

R7

  • A (Accumulator)

A (Accumulator)

  • B

B

  • DPTR (DPH, DPL)

DPTR (DPH, DPL)

Memory Memory

  • General purpose register R0 - R7 (00h - 1Fh)

General purpose register R0 - R7 (00h - 1Fh)

  • Bit addressable RAM (20h - 2Fh)

Bit addressable RAM (20h - 2Fh)

  • General purpose memory (30 - 7Fh)

General purpose memory (30 - 7Fh)

slide-34
SLIDE 34

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

8051 Addressing Mode 8051 Addressing Mode

  • Immediate addressing mode

Immediate addressing mode

MOV MOV A,#20h A,#20h

  • Direct addressing mode

Direct addressing mode

MOV MOV A,20h A,20h

  • Indirect addressing mode

Indirect addressing mode MOV

MOV A,@R0 A,@R0

  • Register addressing mode

Register addressing mode MOV

MOV A,R0 A,R0

slide-35
SLIDE 35

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

8051 Instruction Set 8051 Instruction Set

  • Arithmetic instruction set

Arithmetic instruction set

  • Logical instruction set

Logical instruction set

  • Boolean instruction set

Boolean instruction set

  • Data transfer instruction set

Data transfer instruction set

  • Program flow control (jump instruction set)

Program flow control (jump instruction set)

slide-36
SLIDE 36

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Arithmetic Instruction Set Arithmetic Instruction Set

Byte = register or one byte memory Byte = register or one byte memory

slide-37
SLIDE 37

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Logical Instruction Set Logical Instruction Set

slide-38
SLIDE 38

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Boolean Boolean Instruction Set Instruction Set

slide-39
SLIDE 39

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Data Transfer Instruction Set Data Transfer Instruction Set

  • Accessing internal data memory

Accessing internal data memory x, x,xx xx

  • Accessing external data memory

Accessing external data memory x, x,xx xx

  • Lookup table read instruction

Lookup table read instruction x, x,xx xx

slide-40
SLIDE 40

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Data Transfer Instruction Set ( Data Transfer Instruction Set (con con

t

t) )

Accessing internal data memory Accessing internal data memory

slide-41
SLIDE 41

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Data Transfer Instruction Set ( Data Transfer Instruction Set (con con

t

t) )

Accessing external data memory Accessing external data memory

slide-42
SLIDE 42

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Data Transfer Instruction Set ( Data Transfer Instruction Set (con con

t

t) )

Table Lookup read instruction Table Lookup read instruction

slide-43
SLIDE 43

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Program Flow Control Program Flow Control

  • Uncondition

Uncondition jump jump

jmp jmp, call, ret , call, ret

  • Condition jump

Condition jump

jz jz, , jnz jnz, , djnz djnz, , cjne cjne

  • Bit condition jump

Bit condition jump

jc jc, , jnc jnc, , jb jb, , jnb jnb, , jbc jbc

slide-44
SLIDE 44

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Program Flow Control ( Program Flow Control (con con

t

t) )

Uncondition Uncondition jump jump

slide-45
SLIDE 45

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Program Flow Control ( Program Flow Control (con con

t

t) )

Condition jump Condition jump

slide-46
SLIDE 46

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Software Basic 8051 Software Basic

Program Flow Control ( Program Flow Control (con con

t

t) )

Bit condition jump Bit condition jump

slide-47
SLIDE 47

Tong+ Tong+ 02/18/2000 02/18/2000

8051 Assembler (SXA51) 8051 Assembler (SXA51)

  • Defination

Defination & Preprocessor & Preprocessor

  • Lable

Lable & Comment & Comment

  • End statement & Predefine

End statement & Predefine

  • Assembly

Assembly

8051 Assembler (SXA51) 8051 Assembler (SXA51)

slide-48
SLIDE 48

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Assembler (SXA51) 8051 Assembler (SXA51)

Defination Defination & Preprocessor & Preprocessor

  • EQU

EQU use to define variable or

use to define variable or contant contant value value Counter Counter EQU EQU 20h 20h

  • > define value of Counter
  • > define value of Counter

Setting Setting EQU EQU 00011010b -> define setting as 1Ah 00011010b -> define setting as 1Ah mov mov

  • > use Counter as variable
  • > use Counter as variable

mov mov

  • > use Counter as constant value
  • > use Counter as constant value
  • DW,

DW, DB DB use to define constant value

use to define constant value DB DB

  • Hello

Hello

  • > define string Hello in Code
  • > define string Hello in Code

DW DW

  • > define value in word
  • > define value in word

mov mov mov mov

  • ll

ll get 48h ( get 48h (

H

H

)

)

slide-49
SLIDE 49

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Assembler (SXA51) 8051 Assembler (SXA51)

Lable Lable and Comment and Comment

  • Use

Use

:

:

to make

to make lable lable to to jmp jmp or call

  • r call
  • Use

Use

;

;

to make comment in code

to make comment in code Main: Main: mov mov r0,#05h r0,#05h ;load r0 with 5 ;load r0 with 5 djnz djnz r0,$ r0,$ ;decrement r0 and ;decrement r0 and jmp jmp if = 0 if = 0 cpl cpl P1.4 P1.4 ;complement P1.4 ;complement P1.4 jmp jmp Main Main ;always jump to main ;always jump to main

slide-50
SLIDE 50

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Assembler (SXA51) 8051 Assembler (SXA51)

End Statement And Predefine End Statement And Predefine

  • Use END at end of program to indicate end for assembler

Use END at end of program to indicate end for assembler

  • Predefine

Predefine Register Bank Register Bank

  • > r0, r1
  • > r0, r1
  • . R7

. R7 Register Register

  • > A, B, DPTR, TH0
  • > A, B, DPTR, TH0

SFR SFR

  • > PCON, TMOD, PSW
  • > PCON, TMOD, PSW

Flag Flag

  • > C, Z, P
  • > C, Z, P
slide-51
SLIDE 51

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Basic Code 8051 Basic Code

8051 Basic Code 8051 Basic Code

Delay Loop

Delay Loop

Delay: Delay: push push ;save register r0 ;save register r0 push push 1 1 ;save register r1 ;save register r1 mov mov r0,#00h r0,#00h ;r0 = 00 ;r0 = 00 Loop: Loop: mov mov r1,#20h r1,#20h ;r1 = 20h ;r1 = 20h djnz djnz r1,$ r1,$ ;loop r1 32 times ;loop r1 32 times djnz djnz r0,Loop r0,Loop ;loop r0 256 times ;loop r0 256 times pop pop 1 1 ;restore register r1 ;restore register r1 pop pop ;restore register r0 ;restore register r0 ret ret ;return ;return

slide-52
SLIDE 52

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Basic Code 8051 Basic Code

8051 Basic Code 8051 Basic Code

Delay Loop Cycle Time

Delay Loop Cycle Time

Delay: Delay: push push ;2 ;2 push push 1 1 ;2 ;2 mov mov r0,#00h r0,#00h ;1 ;1 Loop: Loop: mov mov r1,#20h r1,#20h ;1 X 256 = 256 ;1 X 256 = 256 djnz djnz r1,$ r1,$ ;2 X 32 X 256 = 16,384 ;2 X 32 X 256 = 16,384 djnz djnz r0,Loop r0,Loop ;2 X 256 = 512 ;2 X 256 = 512 pop pop 1 1 ;2 ;2 pop pop ;2 ;2 ret ret ;2 ;2 Total time = 2 + 2 + 1 + 256 + 16,384 + 512 + 2 + 2 + 2 = 17,163 Total time = 2 + 2 + 1 + 256 + 16,384 + 512 + 2 + 2 + 2 = 17,163 uS uS

slide-53
SLIDE 53

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Basic Code 8051 Basic Code

8051 Basic Code 8051 Basic Code

Delay: Delay: push push push push 1 1 mov mov r0,#00h r0,#00h Loop: Loop: mov mov r1,#20h r1,#20h djnz djnz r1,$ r1,$ djnz djnz r0,Loop r0,Loop pop pop 1 1 pop pop ret ret

Pulse generator Pulse generator

Main: Main: cpl cpl p1.0 p1.0 ;toggle p1.0 ;toggle p1.0 call call delay delay ;delay ;delay jmp jmp Main Main ;infinite loop ;infinite loop

Duty cycle = 50% Duty cycle = 50% Pulse width = 17,163 Pulse width = 17,163 uS uS Frequency = 58.26 Hz Frequency = 58.26 Hz Cystals Cystals = 12 MHz = 12 MHz

slide-54
SLIDE 54

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Basic Code 8051 Basic Code

8051 Basic Code 8051 Basic Code

Pulse generator use timer Pulse generator use timer

ORG ORG 0000H 0000H jmp jmp Main Main ORG ORG 000BH 000BH jmp jmp T0_ISR T0_ISR Main: Main: setb setb EA EA setb setb ET0 ET0 mov mov TMOD,#00000010 TMOD,#00000010 mov mov TH,#20h TH,#20h mov mov TL,#20h TL,#20h setb setb TR0 TR0 jmp jmp $ $

T0_ISR:

T0_ISR: push push psw psw cpl cpl p1.0 p1.0 pop pop psw psw ret ret

Duty cycle = 50% Duty cycle = 50% Pulse width = 32 Pulse width = 32 uS uS Frequency = 31250 Hz Frequency = 31250 Hz Cystals Cystals = 12 MHz = 12 MHz

slide-55
SLIDE 55

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Basic Code 8051 Basic Code

8051 Basic Code 8051 Basic Code

External Interrupt External Interrupt

ORG ORG 0000H 0000H jmp jmp Main Main ORG ORG 0003H 0003H jmp jmp INT0_ISR INT0_ISR Main: Main: setb setb EA EA setb setb EX0 EX0 setb setb IT0 IT0 mov mov P0,#0 P0,#0 jmp jmp $ $ INT0_ISR: INT0_ISR: push push psw psw inc inc P0 P0 pop pop psw psw reti reti Count pulse on INT0 pin (external Count pulse on INT0 pin (external Interrupt 0) and display counter on Interrupt 0) and display counter on

slide-56
SLIDE 56

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

C1, C2 20 - 40 C1, C2 20 - 40 pF pF

slide-57
SLIDE 57

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

Power On Reset Power On Reset

slide-58
SLIDE 58

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

slide-59
SLIDE 59

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

External Program Memory Read Cycle External Program Memory Read Cycle

slide-60
SLIDE 60

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

slide-61
SLIDE 61

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

Exteranl Exteranl Data Memory Read Cycle Data Memory Read Cycle

slide-62
SLIDE 62

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

Exteranl Exteranl Data Memory Write Cycle Data Memory Write Cycle

slide-63
SLIDE 63

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

8051 8051 P1-P3 P1-P3 P0 P0 VCC VCC 10K 10K

Input/Output Input/Output

Mov Mov a,P0 a,P0 Mov Mov P1,a P1,a

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SLIDE 64

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

8051 8051 P1-P3 P1-P3 P0 P0 VCC VCC 10K 10K VCC VCC LED LED 300 300

Input with switch, Output with LED Input with switch, Output with LED Mov Mov a,P0 a,P0 Mov Mov P1,a P1,a Mov Mov P1,#00 P1,#00 Mov Mov P1,# P1,#FFh FFh

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SLIDE 65

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

8051 8051 P1.0, Row0 P1.0, Row0 P1.1, Row1 P1.1, Row1 P1.2, Row2 P1.2, Row2 P1.3, Col0 P1.3, Col0 P1.4, Col1 P1.4, Col1 P1.5, Col2 P1.5, Col2

Matrix keyboard by scanning Matrix keyboard by scanning techinque techinque

Mov Mov P1,# P1,#FEh FEh Jnb Jnb P1.3,Key1 P1.3,Key1 Jnb Jnb P1.4,Key2 P1.4,Key2 Jnb Jnb P1.5,Key3 P1.5,Key3 Mov Mov P1,# P1,#FDh FDh Jnb Jnb P1.3,Key4 P1.3,Key4 Jnb Jnb P1.4,Key5 P1.4,Key5 Jnb Jnb P1.5,Key6 P1.5,Key6 Mov Mov P1,# P1,#FBh FBh Jnb Jnb P1.3,Key7 P1.3,Key7 Jnb Jnb P1.4,Key8 P1.4,Key8 Jnb Jnb P1.5,Key9 P1.5,Key9 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9

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SLIDE 66

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

8051 8051 8 8 P1 P1 P2.0 P2.0 P2.1 P2.1 P2.2 P2.2 P2.3 P2.3 7-Segment (common Anode) 7-Segment (common Anode)

7-Segment Display by Scan 7-Segment Display by Scan Tecnique Tecnique

Loop: Loop: Mov Mov P1,#Num1 P1,#Num1 Mov Mov P2,#00h P2,#00h Call Delay Call Delay Mov Mov P1,#Num2 P1,#Num2 Mov Mov P2,#01h P2,#01h Call Delay Call Delay Mov Mov P1,#Num2 P1,#Num2 Mov Mov P2,#01h P2,#01h Call Delay Call Delay Mov Mov P1,#Num2 P1,#Num2 Mov Mov P2,#01h P2,#01h Call Delay Call Delay Jmp Jmp Loop Loop

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SLIDE 67

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

8051 8051 TX TX RX RX GND GND PC PC Use null modem connector Use null modem connector And XTAL = 11.0592MHz And XTAL = 11.0592MHz

Serial Communication Via RS-232C Port Serial Communication Via RS-232C Port

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SLIDE 68

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

Serial Communication Via RS-232C Port Serial Communication Via RS-232C Port

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SLIDE 69

ORG ORG 0000H 0000H Jmp Jmp Start Start ORG ORG 0023H 0023H Jmp Jmp Serial_ISR Serial_ISR ORG ORG 0040H 0040H Start: Start: Clr Clr PCON.7 ;clear SMOD PCON.7 ;clear SMOD Mov Mov SCON,#52h ;set mode SCON,#52h ;set mode Mov Mov TMOD,#20h;timer mode 2 TMOD,#20h;timer mode 2 Mov Mov TH1,# TH1,#FDh FDh ;set reload value ;set reload value Setb Setb EA EA ;enable all ;enable all Int Int. . Setb Setb REN REN ;enable Receive ;enable Receive Setb Setb TR1 TR1 ;start Timer ;start Timer Mov Mov DPTR,#0000h DPTR,#0000h

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

Serial Communication Via RS-232C Port Serial Communication Via RS-232C Port

Serial_ISR: Serial_ISR: Push Push PSW PSW Push Push Acc Acc Jnb Jnb RI,TX_ RI,TX_Evnt Evnt Mov Mov A,SBUF A,SBUF jnb jnb TI,$ TI,$ Mov Mov SBUF,A SBUF,A Clr Clr TI TI Jmp Jmp End_ISR End_ISR TX_ TX_Evnt Evnt: : Inc Inc DPTR DPTR End_ISR: End_ISR: Pop Pop Acc Acc Pop Pop PSW PSW Reti Reti

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SLIDE 70

Tong+ Tong+ 02/18/2000 02/18/2000 8051 Interface 8051 Interface

8051 Interface 8051 Interface

Baud Rate Baud Rate

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SLIDE 71

Assigment Assigment

Bubble Sort Bubble Sort 0000h = Counter, 0001h - 00xxh = External Data (< 256 bytes)

0000h = Counter, 0001h - 00xxh = External Data (< 256 bytes) Start Start N = Data[0] N = Data[0] Data = Data[1-N] Data = Data[1-N] For I = 1 to N-1 For I = 1 to N-1 For J = 1 to I-1 For J = 1 to I-1 If I > J then If I > J then Swap Swap End End