[PPT] - Introduction to Computer Science CSCI 109 Readings St. Amant, Ch. PowerPoint Presentation

SLIDE 1

Introduction to Computer Science

CSCI 109

Andrew Goodney

Spring 2018

China – Tianhe-2

Readings

St. Amant, Ch. 3

Lecture 2: Architecture Jan 22nd, 2018

SLIDE 2

Reminders

uTake the survey if you haven’t already

v https://usc.qualtrics.com/jfe/form/SV_0dKlS7wjGvUMiGh

uWork on HW #1. It is due 1/29. uQuiz #1 is on 1/29. It will cover material taught

n 1/8 and 1/22.

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SLIDE 3

Schedule

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SLIDE 4

Computer Architecture

uThe von Neumann architecture uThe Central Processing Unit (CPU) uStorage uInput and Output

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Reading:

St. Amant Ch. 3

SLIDE 5

The von Neumann Architecture

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Input Output Controller Arithmetic and Logic Unit Memory

Controller + ALU = Central Processing Unit (CPU)

SLIDE 6

The Central Processing Unit (CPU)

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u Controller + ALU = Central Processing Unit (CPU) u CPU has a small amount of temporary memory within it

v Registers v A special register called the program counter (PC)

u CPU performs the following cycle repeatedly

Fetch Instruction Decode Instruction Execute Instruction

SLIDE 7

Typical Controller Tasks

u Read an instruction from memory u Direct ALU to do some arithmetic or logic operation u Transfer data from one place to another u Prepare for next instruction to be read u Send a directive to input or output device

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Input Output Controller Arithmetic and Logic Unit Memory

SLIDE 8

Typical ALU Tasks

u Perform an arithmetic operation on the contents of

registers e.g., add R1 and R2 and put the result in R1 (R1 = R1 + R2)

u Perform a logical operation on the contents of registers

e.g., compare R1 and R2 (R1 < R2 ?)

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Input Output Controller Arithmetic and Logic Unit Memory

SLIDE 9

Improving the CPU

u Faster clock (~GHz on modern computers) u Specialized ALU (e.g., GPU) or more than one ALU u Multiprocessing (more than one CPU) u Streamlining Controller-ALU cooperation (pipelining) u More complex ALU instructions ?

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Input Output Controller Arithmetic and Logic Unit Memory

SLIDE 10

Storage: Addressing and Random Access

u How is storage organized ? u Linear ordering v Each stored item has a an address (which is a number) v To retrieve an item you have to know this number v Retrieval is by address

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Input Output Controller Arithmetic and Logic Unit Memory

SLIDE 11

Storage: Modular and Hierarchical

u Analogy with office files v Each (physical) file has a number v When a file is needed, you ask for it by number v In the office, files may be stored in shelves, on tables,

in cabinets, etc.

u Storage is modular: as long as the person who wants

the file knows its number and as long as the storekeeper can find the file, doesn’t matter exactly how physical files are stored

u Or where they are stored: Files may be stored in a

basement – not easy to reach

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SLIDE 12

The Nature of Computer Storage

u Only one item can be stored at one memory location u Random access (RAM) – all locations in memory are (on

the average) equally slow (or fast) in terms of access speed

u Storage is hierarchical

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Input Output Controller Arithmetic and Logic Unit Registers Disk RAM CPU Input Output Controller Arithmetic and Logic Unit Memory

SLIDE 13

The Storage Hierarchy

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Input Output Controller Arithmetic and Logic Unit Registers Disk RAM CPU

Registers RAM (memory) Secondary Storage (Disk Space)

Cheaper Faster

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Volatile Storage, Special Memory

u Volatile: memory is erased when power turned off v Registers, RAM (often called primary storage) u Non-volatile: memory intact when power turned off v Secondary storage (disk) u Booting and ROM (read-only memory) u Cache: small, fast memory between registers and RAM

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Input Output Controller Arithmetic and Logic Unit Registers CPU Disk RAM Cache Input Output Controller Arithmetic and Logic Unit Registers Disk RAM CPU

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Cache

u Small (but bigger than registers) u Volatile u Fast (not as fast as registers, but faster than RAM) u What to keep in the cache ? v Things that programs are likely to need in the future v Locality principle:

u Look at what items in memory are being used u Keep items from nearby locations (spatial locality) u Keep items that were recently used (temporal locality)

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SLIDE 16

Input and Output

u Input: Interrupt-driven

v e.g., Key strokes are slow, CPU treats them like special

events

u Output: Write to special memory (e.g., video memory)

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Input Output Controller Arithmetic and Logic Unit Registers CPU Disk RAM Cache

SLIDE 17

Creating Assembly (Machine) Code

u Adding four numbers in C is easy

a = b + c + d + e

u Equivalent assembly code

add a, b, c OR add a, b, c add a, a, d add f, d, e add a, a, e add a, a, f

u Which one is better ? Are the two equivalent ?

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SLIDE 18

Programs at Different Abstraction Levels

u C code

a = b + c

u Assembly code

add a, b, c

u Machine code 00000010001100100100000000100000

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SLIDE 19

Programs at Different Abstraction Levels

u C code

a = b + c

u Assembly code

add a, b, c

u Machine code 00000010001100100100000000100000

6 bits – opcode 5 bits: source register 1 5 bits: source register 2 5 bits: destination register 5 bits: shift amount 5 bits: functions

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SLIDE 20

Typical Operations

u ADD Ri Rj Rk

Add contents of registers Ri and Rj and put result in register Rk

u SUBTRACT Ri Rj Rk

Subtract register Rj from register Ri and put result in register Rk

u AND Ri Rj Rk

Bitwise AND contents of registers Ri, Rj and put result in register Rk

u NOT Ri

Bitwise NOT the contents of register Ri

u OR Ri Rj Rk

Bitwise OR the contents of registers Ri, Rj and put result in register Rk

u SET Ri value

Set register Ri to given value

u SHIFT-LEFT Ri

Shift bits of register Ri left

u SHIFT-RIGHT Ri

Shift bits of register Ri right

u MOVE Ri Rj

Copy contents from register Ri to register Rj

u LOAD Mi Ri

Copy contents of memory location Mi to register Ri

u WRITE Ri Mi

Copy contents of register Ri to memory location Mi

u GOTO Mi

Jump to instruction stored in memory location Mi

u COND_GOTO Ri Rj Mi

If Ri > Rj and R2, jump to instruction stored in memory location Mi

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SLIDE 21

A Typical Day at PaniCorp

u Central processing: Connie and Alun u The bus: Buster u Storage (Memory): Mr. Lager u Input and output

Play out a typical instruction cycle with your friends

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Read St. Amant Ch. 3

SLIDE 22

M100 SET R1 MI M101 SET R2 0 M102 SET R3 1 M103 SET R6 0 M104 ADD R1 R2 R4 M105 SUB R1 R3 R5 M106 MOVE R5 R1 M107 MOVE R4 R2 M108 COND_GOTO R1 R6 104 M109 WRITE R2 M2 M110 END What does this program do?

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PC R1 R2 R3 R4 R5 R6 M1 M2 3