IN INSIDE A COMPUTER COMPUTER BU BUS S ARCHITECTURE ECE 422 DATA - - PowerPoint PPT Presentation

DATA COMMUNICATION IN INSIDE A COMPUTER

COMPUTER BU BUS S ARCHITECTURE

ECE 422 – DATA COMMUNICATIONS & COMPUTER NETWORKS Friday, 13 March 2020

GENERAL BL BLOCK DIA IAGRAM OF TH THE COMPUTER SYSTEM

Input Processing Output Input devices:

It is used to insert data into a computational device

Mouse Keyboard Joystick Controller Output devices:

It is used to retrieve information from a computational device

Monitor Projector Speakers Output Input CPU Memory

WHAT IS A COMPUTER SYSTEM BUS?

• 1. A computer system bus is a name given to electronic pathways

consisting of a number of conducting wires to which all the CPU, memory, secondary memory and peripheral devices attach, or

• 2. A system bus in a single computer connects the major

components of the computer system.

• 3. The bus technique was developed to provide cost effective

connectivity and to make it easier to attach peripheral devices .

• 4. It constitutes a data bus, address bus and control bus.

ADVANTAGES OF BUSES

• 1. Versatility:
• New devices can be added easily
• Peripherals can be moved between computer

systems that use the same bus standard

• 2. Low Cost:
• A single set of wires is shared in multiple ways

Memory Processor I/O Device I/O Device I/O Device

DISADVANTAGES OF BUSES

• 1. It creates a communication bottleneck
• The bandwidth of that bus can limit the maximum I/O throughput
• 2. The maximum bus speed is largely limited by:

a) The length of the bus b) The number of devices on the bus c) Performance of peripheral devices which have:

• Widely varying latencies
• Widely varying data transfer rates

Memory Processor I/O Device I/O Device I/O Device

BASIC BUS TE TERMINOLOGY (1 (1)

• 1. Bus protocol: Rules determining the format and

transmission of data through bus.

• 2. Parallel bus: Data is transmitted in parallel.

a) Advantage: fast b) Disadvantage: high cost for long distance transmission, interference between lines at high frequency.

• 3. Serial bus: data is transmitted in serial.

a) Advantage: low cost for long distance transmission, less interference. b) Disadvantage: slow

4. Bus master: The device control access to the bus. Other devices are called slaves

• 1. Local (system) bus: CPU  main memory.
• 2. Front Side Bus (FSB):
• 1. Original concept: CPU  components
• 2. Modern Intel architecture: CPU  NorthBridge chipset
• 3. Back side bus: CPU  L2 cache, CPU  Southbridge
• 4. Memory bus: Northbridge chipset  main memory
• 5. AGP bus: Northbridge chipset  GPU
• 6. ISA, EISA, VLB, PCI, Firewire, USB,
• 7. PCI-Express bus: motherboard  peripheral devices.

BASIC BUS TE TERMINOLOGY (2 (2)

A COMPUTER SYSTEM WIT ITH ONE BUS: BACKPLANE BUS

• 1. A single bus (the backplane bus) is used for:
• Processor to memory communication
• Communication between I/O devices and memory
• 2. Advantages: Simple and low cost
• 3. Disadvantages: slow and the bus can become a major

bottleneck Example: Original IBM PC (1982)

Processor Memory I/O Devices Backplane Bus

A COMPUTER SYSTEM WIT ITH TWO BUSES

• 1. I/O buses tap into the processor-memory bus via bus adaptors:
• Processor-memory bus: mainly for processor-memory traffic
• I/O buses: provide expansion slots for I/O devices
• 2. Apple Macintosh-II
• NuBus: Processor, memory, and a few selected I/O devices
• SCCI Bus: the rest of the I/O devices

Processor Memory I/O Bus Processor Memory Bus Bus Adaptor Bus Adaptor Bus Adaptor I/O Bus I/O Bus

COMPUTER SYSTEM WIT ITH THREE-BUS SYSTEM

• 1. A small number of backplane buses tap into the processor-memory bus
• Processor-memory bus is used for processor-memory traffic
• I/O buses are connected to the backplane bus
• 2. Advantage: loading on the processor bus is greatly reduced

Processor Memory Processor Memory Bus Bus Adaptor Bus Adaptor Bus Adaptor I/O Bus Backplane Bus I/O Bus

BUS PERFORMANCE/MEASUREMENT

We measure data transfer on a bus by two metrics:

• Bus width: indicates the number of wires in the bus for

transferring data.

• Bus bandwidth: refers to the total amount of data that can

theoretically be transferred on the bus in a given unit of time.

EXAMPLE: CALCULATING BANDWIDTH OF A BUS

A bus has a width of 16 bits and operates at a clock speed

• f 133 MHz. Find the bandwidth (transfer speed), S in (i)

bits/sec (ii) Bytes/Sec (iii) KB/s (iv) Mb/s SOLUTION S = 16 X 133 X 106 = 2,128*106 bit/s = 2,128 X 106/8 = 266*106 bytes/s = 266 X 106 /1000 = 266*103 KB/s = 266 X 103 /1000 = 266 MB/s

DIF IFFERENT TY TYPES OF COMPUTER BUSES - IB IBM

• 1. 1982 – Industry Standard Architecture (ISA) by IBM -

4.77 MB/s (8 bits wide at 4.77 MHz)

• 2. 1988 – Extended Industry Standard Architecture

(EISA) - 33.32 MB/s (32 bits at 8 MHz)

• 3. Early 90's - Peripheral Component Interconnect (PCI)
• 133MB/s (32-bit at 33 MHz)
• 4. Mid 90's – Universal Serial Bus(USB) 1.0 - 1.5

MB/sec

• 5. 2000 – Universal Serial Bus (USB) 2.0 - 60 MB/sec
• 6. 2010 – Universal Serial Bus (USB) 3.0 - 500 MB/sec
• 7. 2011 - Peripheral Component Interconnect (PCI)

Express 3.0 - 31.5 GB/s

Bus Width (bit) Bandwidth (MB/s) 16-bit ISA 16 15.9 EISA 32 31.8 VLB 32 127.2 PCI 32 127.2 64-bit PCI 2.1 (66 MHz) 64 508.6 AGP 8x 32 2,133 USB 2 1 Slow-Speed: 1.5 Mbit/s Full-Speed: 12 Mbit/s Hi-Speed: 480 Mbit/s Firewire 400 1 400 Mbit/s

WID IDTH AND BANDWIDTH OF SOME TY TYPICAL BUSES

SYNCHRONOUS AND ASYNCHRONOUS BUSES

• 1. Synchronous Bus:
• Includes a clock in the control lines
• A fixed protocol for communication that is relative to the clock
• Advantage:
• involves very little logic and can run very fast
• Disadvantages:
• Every device on the bus must run at the same clock rate
• To avoid clock skew, the cables cannot be long if they are fast
• 2. Asynchronous Bus:
• It is not clocked
• It can accommodate a wide range of devices
• It can be lengthened without worrying about clock skew
• It requires a handshaking protocol

CPU MEMORY INPUT AND OUTPUT

System BUS

Control BUS It is used by the CPU to communicate with other devices Address BUS

It is used to specify a physical address for the CPU

Data BUS It allows the transfer of data between two components on the motherboard, or between two CPUs

ORGANIZATION OF A COMPUTER SYSTEM

TYPES OF COMPUTER BUSES

There are two types of computer buses, i.e

• 1. Internal bus (or system bus or Front

Side Bus (FSB)): A group of wires or electronic pathways that happen inside system unit.

• 2. External bus (expansion bus): A group
• f wires or electronic pathways that

facilitate communication between the system unit and other devices.

SYSTEM BUS (1) - DATA BUS

1. A data bus is a collection of wires (transmission paths) through which data is transmitted from one part of a computer to another is called Data Bus. 2. Data Bus can be thought of as a highway on which data travels within a computer. 3. This bus connects all the computer components to the CPU and main memory. 4. The size (width) of bus determines how much data can be transmitted at one time. 5. A 16-bit bus can transmit 16 bits of data at a time. 6. 32-bit bus can transmit 32 bits at a time.

SYSTEM BUS (2) - ADDRESS BUS

• 1. A collection of wires used to identify particular location

in main memory or a specific location of secondary memory is called Address Bus.

• 2. Or, in other words, the information used to describe the

memory locations travels along the address bus.

• 3. The size of address bus determines how many unique

memory locations can be addressed. a) A system with 4-bit address bus can address 24 = 16 Bytes of memory. b) A system with 16-bit address bus can address 216 = 64 KB of memory. c) A system with 32-bit address bus can address 232 = 4.3 GB of memory

• 1. CPU places address of the

location it wants to read on the address lines.

• 2. After the voltages on the

address lines have become stable, CPU asserts MREQ and RD lines.

• 3. Memory controller locates

memory location and loads it into data lines.

SYSTEM BUS (3) - CONTROL BUS

• 1. The connections that carry control

information between the CPU and other devices within the computer is called Control Bus.

• 2. The control bus carries signals that report

the status of various devices or type of

• peration being carried out.
• 3. The control bus can, for instance, be used to

indicate whether the CPU is reading from memory or writing to memory.

BRIDGE-BASED BUS ARCHITECTURES

• 1. A computer system may include many buses which are

segregated by bridges.

• 2. Advantage: Bridges allow the many buses to operate

simultaneously.

• 3. Intel architecture:

RAM CPU North Bridge AGP (GPU) Legacy BIOS IDE

(integrated drive electronics)

ISA

(Industry standard architecture)

USB PCI(e) South Bridge The Northbridge connects with the faster I/O’s such as the RAM and the AGP, the Northbridge is bigger looking than the Southbridge, the Southbridge connects with the slower I/O’s such as the USB and the BIOS. The Northbridge and Southbridge are sometimes referred to as chipsets.

INTEL BUS ARCHITECTURE

Mouse Keyboard Joystick NIC

Front Side Bus (FSB)

HOW THE NORTH BRIDGE WORKS

1. When the CPU needs data from RAM, a request is sent to the Northbridge memory controller. 2. After the request has been received, the bridge responds with how long the processor will need to wait in order to read the memory over the front side bus(FSB). 3. The CPU proceeds to undertake other activities and goes back to read the data after the time it got from the north bridge.

CPU MULTIPLIER

• 1. CPU multiplier (also called clock ratio, clock

multiplier or CPU Core Ratio) is the ratio between the CPU and the FSB bus speed.

• 2. For example, a CPU with a multiplier of 20 and an

external clock of 133 MHz will have a CPU speed

• f 2.66GHz.
• 3. Memory often has a multiplier assigned to it

which some BIOS let you alter (tweak with) for different performance.

OVERCLOCKING THE CPU

• 1. CPU speed is generally calculated from the bus

speed (often called the FSB) and a multiplier. i.e , CPU speed = Bus Speed X Multiplier

• 1. You overclock your CPU by increasing bus speed
• r the multiplier or both. Increasing the bus

speed tends to have the best effect.

At the same CPU speed, the computer will be MUCH faster with a 200MHz bus then with a 100MHz bus.

1. This is because the bus is what carriers the data to and from the CPU. 2. The faster you make the bus the less of a bottleneck it becomes. The CPU no longer has to wait as long for the next instruction. 3. This however requires better cooling, since both the CPU and the chipsets (read north bridge) work extra time and consume more current!

OVERCLOCKING THE CPU (2)

MODERN PC MOTHERBOARD DESIGN

MODERN PC MOTHERBOARD DESIGN (1)

INTEL MODERN PC MOTHERBOARD DESIGN (2)

INTEL MOTHERBOARD CHIPSETS - NORTHBRIDGE

• 1. The Northbridge is an

integrated circuit (e.g. Intel ) that is responsible for communications between the CPU interface and

a) AGP, b) PCI, c) RAM

• 2. It gets its name for

commonly being top of the PCI bus.

1. The Southbridge is responsible for interfacing with:

a) Hard-drive controller, b) I/O controller c) Integrated hardware such as sound card, video card if present on the motherboard, d) USB, e) Network Interface Cards, e.g. Ethernet NIC.

2. It gets its name for commonly being bottom of the PCI bus.

MOTHERBOARD CHIPSETS - SOUTHBRIDGE