Impact of PCB Manufacturing, Design, and Material to PCB Warpage A. - - PowerPoint PPT Presentation

Impact of PCB Manufacturing, Design, and Material to PCB Warpage

• A. Caputo2, S.R. Aravamudhan2, H. Fu1, N. Hubble3, C. Olson3, M. Huang4, A. Hsieh4, J.W. Cai5, Y. Li5, D. Li5, P. Vernhes6,
• B. Feit6, P.L. Toussaint6, CC. Chang7, L.L. Qin7, C.Y. Hsu7, C. Lin8

1iNEMI, 2Intel Corporation, 3Akrometrix, 4Wistron Corporation, 5Shengyi Technology, 6Insidix, 7Unimicron, 8HannStar

Board Corporation

Agenda

• Project Motivation
• iNEMI Project Overview
• DOE set-up
• Experimental set-up
• Phase 1: Matching study
• Results

ü Phase 2: The effect of post PCB manufacturing bake on PCB warpage ü Phase 3: The effect of PCB manufacturing, thickness, and material on PCB warpage

• Summary
• Next steps

Project Motivation

Background:

• PCBs with thickness ≤ 1.0mm (40mils ) are driving higher PCB warpage in board assembly process leading to lower assembly

yields and higher rework for some components

• IPC-TM-650 (Bow & Twist) specification for incoming PCB warpage is not sufficient to address the warpage at elevated

assembly reflow temperature Objectives of the iNEMI Project:

• Guidelines/recommendation to minimize PCB warpage for thin PCBs as a function of PCB fabrication, PCB design and PCB

assembly processes Value to Industry:

• Reduce SMT risk for semiconductor packages (reduction in PCB warpage will provide margin to semiconductor packages)

and proliferate the iNEMI project learnings to industry

iNEMI Project Overview

Phase 1: Proj

• ject

Planning Planning Phase Phases 2 s 2-3: PCB 3: PCB Fabri rication

• n DOE

Phase Phase 4: PCB 4: PCB Desi Design DOE gn DOE Phase Phase 5: A 5: Asse ssembly mbly Proc

• cess DOE

Project Planning

• Align on DOE details
• Identify PCB designs for

evaluation

• Identify PCB vendors to support

the project

• Evaluation and identification of

PCB warpage metrology

• Metrology matching

PCB Fabrication DOE

• Identify PCB fabrication

processes impact to warpage

• Lamination process
• Center vs. Corner
• Evaluate across 2 PCB

thicknesses, 1 PCB dimension, 2 materials and 2 PCB fabricators PCB Design DOE

• Identify PCB design

parameters impact to warpage

• CU balance across

layers

• CU balance between
• Evaluate across 2 PCB

thickness, 2 PCB dimension PCB Assembly Process DOE

• Identify PCB assembly process

parameters impact to warpage

• Focus on reflow pallet

material & design elements

• Evaluate across 2 PCB

thicknesses, 2 PCB dimension

Focus of this presentation

DOE Set-up

DOE Factors Level 1 Level 2 PCB fabrication house Supplier A Supplier B PCB fabrication process Condition A Condition B PCB location within manufacturing panel Center Corner PCB thickness 0.6mm 0.8mm PCB material Mid Tg High Tg Post processing Yes No

Objective: Evaluate the impact of the PCB fabrication process on PCB warpage

Fixed Factors: BGA land pattern Response Variable: PCB & local area of interest (i.e. > 35mm large BGA & Shield fence area) warpage measurements at room temp and peak reflow temperature (240 oC) Partial DOE

Summary of DOE

DOE Leg PCB Fabrication Process PCB Material PCB Thickness (mm) Post Processing 3 Condition B

• Mid. Tg

0.8 No 5 Condition A High Tg 0.8 No 7 Condition B High Tg 0.8 No 9 Condition A

• Mid. Tg

0.6 No 11 Condition B

• Mid. Tg

0.6 No 13 Condition A High Tg 0.6 No 15 Condition B High Tg 0.6 No

Phase 1: Metrology matching study Phase 2: The effect of post PCB manufacturing bake on PCB warpage

DOE Leg PCB Fabrication Process PCB Material PCB Thickness (mm) Post Processing 1 Condition A

• Mid. Tg

0.8 No 2 Condition A

• Mid. Tg

0.8 Yes

Phase 3: The effect of PCB manufacturing, thickness, and material on PCB warpage

Note: Partial factorial DOE was performed

Attribute Vendor A Vendor B Condition A Condition B Condition A Condition B

• Mid. Tg

High Tg Mid.Tg High Tg

• Mid. Tg & High Tg
• Mid. Tg & High Tg

Lamination Temp. (curing) °C >170 >190 >170 >190 170 175 Heating Rate (°C/min) 1.77 2.85 1.43 2.28 1.58 (inner layer) 1.62 (outer layer) 2.4 Cold Press Time (minutes) 40 40 70 70 40 70 Cure Time (minutes) 77 110 103 122 96 70

Summary of Press/Lamination Conditions

Experimental Set-up: Copper Balancing

≤ 10% Copper Balance, Solid Outrigger Copper Balance Layer Percent Layer Copper Density Percent Outrigger Copper Density 1 72.9 ≥ 95 2 84.4 ≥ 95 3 89.2 ≥ 95 4 73.1 ≥ 95 5 77.9 ≥ 95 6 77.3 ≥ 95 7 74.1 ≥ 95 8 82.9 ≥ 95 9 86.1 ≥ 95 10 82.6 ≥ 95

Experimental Set-up: Stack-ups

thickness (um) S/M 15 L1 1/3oz+plating 25 prepreg PP1037 40 L2 1/3oz+plating 15 prepreg PP1037 40 L3 1/3oz+plating 15 prepreg PP1037 40 L4 1/3oz+plating 15 prepreg PP1037 50 L5 1/3oz+plating 15 Core 2.6mil 65 L6 1/3oz+plating 15 prepreg PP1037 50 L7 1/3oz+plating 15 prepreg PP1037 40 L8 1/3oz+plating 15 prepreg PP1037 40 L9 1/3oz+plating 15 prepreg PP1037 40 L10 1/3oz+plating 25 S/M 15

• verall board thickness

605 thickness (um) S/M SolderMask 40 L1 Copper(Base+Plating) 30 prepreg Prepreg/1-1067 55 L2 Copper(Base+Plating) 25 prepreg Prepreg/1-1067 55 L3 Copper(Base+Plating) 25 prepreg Prepreg/1-1067 55 L4 Copper(Base+Plating) 25 prepreg Prepreg/1-1067 55 L5 Copper(Base+Plating) 25 Core Core 60 L6 Copper(Base+Plating) 25 prepreg Prepreg/1-1067 55 L7 Copper(Base+Plating) 25 prepreg Prepreg/1-1067 55 L8 Copper(Base+Plating) 25 prepreg Prepreg/1-1067 55 L9 Copper(Base+Plating) 25 prepreg Prepreg/1-1067 55 L10 Copper(Base+Plating) 30 S/M SolderMask 40

• verall board thickness

840

Thin PCB: ~0.6 mm Thick PCB: ~0.8 mm

Experimental Set-up: Manufacturing Panel Layout

• One Manufacturing panel è Eight shipping panels
• Shipping panel location è 1,2,7,& 8 è Corner panels
• Shipping panel location è 3-6 è Center panels
• 1 Shipping panel = 4-up (i.e. 4 PCBs)
• Red boxes è BGA area warpage measurement (~13 mm x 13 mm)
• Yellow box è Panel area warpage measurement

~79 mm ~64 mm

Phase 1: Matching Study

Phase 1: Matching Study

• 1. Step Block for Accuracy evaluation at room temperature

Precision machined steel block with steps of ~25 µm, ~139 µm, & ~265 µm for linearity check in accuracy measurements was used The block was ISO certified by third party Test site C provided the step block for this matching study

• 2. Lens for thermal repeatability

Optical flat lens from fused silica with known radius of curvature 16 measurements at Room Temp, 150 C & 250 C using J-STD-020 peak reflow temperature specification called out in IPC 9641 specification (section 5.4 and section 6) A flat surface was ensured at the edge of lens

• 3. Thermal performance comparison

Compare thermal performance of the various tools following J-STD-020 peak reflow temperature specification PCB with thermocouples were attached and measurements were performed by external data logger Maintained a lower reflow max temp to avoid degradation

Phase 1: Matching Study

• 1. Step Block for Accuracy evaluation at room temperature

Block Step Heights Success Criteria Site B (µm) Site C (µm) Site D (µm) Site E(µm) Step 1 (24.384 µm) ±2% (23.9 µm – 24.9 µm) or Tool Resolution (± 5 µm) Mean: 23.0 STDEV: 0 Mean: 24.2 STDEV: 0.05 *Mean: 21.9 STDEV: 0.62 *Mean: 23.6 STDEV: 0.07 Step 2 (139.192 µm) ±2% (136.4 µm – 142.0 µm) or Tool Resolution (± 5 µm) Mean: 136.3 STDEV: 7.32 Mean: 138.5 STDEV: 0 Mean: 139.5 STDEV: 1.27 Mean: 139.0 STDEV: 0 Step 3 (265.43 µm) ±2% (260.1 µm – 270.7 µm) or Tool Resolution (± 5 µm) Mean: 258.6 STDEV: 0.51 Mean: 264.6 STDEV: 0.05 Mean: 266.8 STDEV: 0.92 Mean: 267.0 STDEV: 0

All test sites, with the exception of test site B, met the ±2% target value

*Step 1 measurements from sites D & E, small area right next to the step was ignored because it impacted the measurement

Phase 1: Matching Study

• 2. Lens for thermal repeatability

All test sites, with the exception of test site B, met the ±5% target value

Temperature (°C) Success Criteria Optical Lens – Manufacturer M Optical Lens – Manufacturer N Site B (µm) Site C (µm) Site D (µm) Site E (µm) 24 ±5% from Target

Optical Lens M Target 372.8 to 388.0um, Optical Lens N Target 671.3 to 698.7um

Mean: 398.69 STDEV: 2.57, CV = 0.006 Mean: 381.03 STDEV: 0.52, CV = 0.001 Mean: 686.0 STDEV: 0.62, CV = 0.001 Mean: 684.94 STDEV: 0.77, CV = 0.001 150 Mean: 398.38 STDEV: 4.41, CV = 0.011 Mean: 380.93 STDEV: 0.80, CV = 0.002 Mean: 685.0 STDEV: 3.5, CV = 0.005 Mean: 683.88 STDEV: 1.63, CV = 0.002 250 Mean: 397.13 STDEV: 1.02, CV = 0.003 Mean: 380.93 STDEV: 1.13, CV = 0.003 Mean: 686.0 STDEV: 4.4, CV = 0.006 Mean: 682.0 STDEV: 1.5, CV = 0.002

Phase 1: Matching Study

• 3. Thermal performance comparison

All test sites, with the exception of test site B, met the ≤ 10 °C technical equivalency

Temperature (°C) Success Criteria (°C) Delta Temperature (°C) Reflow Oven Site B Site C Site D Site E 24 ≤ 10 oC 0.33 0.44 2.00 0.30 1.20 150 ≤ 10 oC 6.67 17.96 7.40 6.50 4.70 200 ≤ 10 oC 4.61 15.78 7.40 4.20 4.60 Peak++ ≤ 10 oC 3.34 12.10 6.40 4.40 4.20 Time to 220 (sec) NA 152 245 336 400 404

Key Takeaway à Test sites C, D, & E were used for testing in this work

Phase 2: The effect of post PCB manufacturing bake on PCB warpage

DOE Leg PCB Fabrication Process PCB Material PCB Thickness (mm) Post Processing 1 Condition A

• Mid. Tg

0.8 No 2 Condition A

• Mid. Tg

0.8 Yes

Phase 2: The effect of post PCB manufacturing bake on PCB warpage

BGA Area Coplanarity at 240 °C

Key Takeaways

• BGA area coplanarity is statistically different between both vendors, but technically equivalent ( mean < 3 µm)
• Post processing has little impact on BGA coplanarity

Phase 2: The effect of post PCB manufacturing bake on PCB warpage

BGA Area Coplanarity at 240 °C vs. The shipping panel location within the manufacturing panel

Key Takeaways

• BGA coplanarity is not impacted by shipping panel location within the manufacturing panel

Phase 2: The effect of post PCB manufacturing bake on PCB warpage

Panel Area Coplanarity at 240 °C

Key Takeaways

• Panel area coplanarity is statistically equivalent between both vendors
• Post processing has little impact on panel coplanarity

Phase 2: The effect of post PCB manufacturing bake on PCB warpage

Panel Area Coplanarity at 240 °C vs. The shipping panel location within the manufacturing panel

Key Takeaways

• Panel coplanarity is not impacted by shipping panel location within the manufacturing panel

Phase 3: The effect of PCB Manufacturing, Thickness, & Material on PCB warpage

DOE Leg PCB Fabrication Process PCB Material PCB Thickness (mm) Post Processing 3 Condition B

• Mid. Tg

0.8 No 5 Condition A High Tg 0.8 No 7 Condition B High Tg 0.8 No 9 Condition A

• Mid. Tg

0.6 No 11 Condition B

• Mid. Tg

0.6 No 13 Condition A High Tg 0.6 No 15 Condition B High Tg 0.6 No

Phase 3: The effect of PCB Manufacturing, Thickness, & Material on PCB warpage

BGA Area Coplanarity at 240 °C

Vendor B Vendor A Key Takeaways

• Vendor A

ü BGA area coplanarity is statistically different between both vendors, but technically equivalent ( mean < 10 µm)

• Vendor B à BGA area coplanarity is statistically equivalent across all legs
• More variability is observed for Vendor A vs. Vendor B è PCB fabrication has impact on BGA area coplanarity

Phase 3: The effect of PCB Manufacturing, Thickness, & Material on PCB warpage

Panel Area Coplanarity at 240 °C

Key Takeaways

• PCB fabrication has impact on panel area coplanarity

Summary

• PCB manufacturing and processing (i.e. press/lamination) has the greatest impact on PCB coplanarity, with thinner

PCBs showing greater variability in coplanarity (i.e. Vendor A) vs. thicker PCBs (0.8 mm). ü Must work with PCB suppliers to minimize PCB warpage

• PCB material, and shipping panel location within the manufacturing panel have minimal impact on PCB

coplanarity

• Post process has little impact on coplanarity

Next Steps

• Key finding à PCB manufacturing and processing (i.e. press/lamination) has the greatest impact on PCB

coplanarity

DOE Leg PCB Fabrication Process PCB Material PCB Thickness (mm) Post Processing 9 Condition A

• Mid. Tg

0.6 No 11 Condition B

• Mid. Tg

0.6 No

• Based on the repeatability of the PCB coplanarity results, the processing conditions A & B will be optimized

for a final round of testing to see if vendor A can produce PCB warpage results similar to vendor B.

• To validate this work à Vendors A & B will repeat legs 9 & 11 using the same material, stack-up & design