Goals for Today Learning Objective: Understand how energy usage - - PowerPoint PPT Presentation

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Goals for Today Learning Objective: Understand how energy usage - - PowerPoint PPT Presentation

Goals for Today Learning Objective: Understand how energy usage informs OS design Announcements, etc: MP4 due May 6th Get started ASAP! HW1 available! Due May 8th Just an appetizer for the final exam Multiple


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CS 423: Operating Systems Design 1

Goals for Today

  • Learning Objective:
  • Understand how energy usage informs OS design
  • Announcements, etc:
  • MP4 due May 6th
  • Get started ASAP!
  • HW1 available! Due May 8th
  • Just an “appetizer” for the final exam
  • Multiple attempts allowed, but first attempt is graded

Reminder: Please put away devices at the start of class

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CS 423: Operating Systems Design

Professor Adam Bates Spring 2018

CS 423
 Operating System Design: Energy and Power Considerations

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SLIDE 3

CS 423: Operating Systems Design

Why care about energy?

3

Low-end Computers:

■ Resource-constrained battery-operated devices

(laptops, phones, wireless sensors, …)

■ Processor speed have grown faster than battery

capacity: energy becomes a bottleneck High-end Computers:

■ Cost of energy is increasing: The energy bill is the

second highest operational expense of data centers (Google, HP, IBM, …)

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SLIDE 4

CS 423: Operating Systems Design

Microprocessor Clock Speed

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■ Moore’s Law (1980-2005) ■ Question: Why did the speed curve level off in 2005?

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SLIDE 5

CS 423: Operating Systems Design

Computational Power (per Die)

5

■ Note the

exponential rise in power consumption

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SLIDE 6

CS 423: Operating Systems Design

Moore’s Law

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Moore’s Law: Transistor count doubles every two years

Named after Intel co-founder Gordon E. Moore, who described the trend in his 1965 paper

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SLIDE 7

CS 423: Operating Systems Design 7

Advanced Configuration and Power Interface (ACPI)


Part of UEFI since 2013

Part of UEFI since 2013:

■ Exposes different power saving states in a

platform-independent manner

■ The standard was originally developed by

Intel, Microsoft, and Toshiba (in 1996), then later joined by HP, and Phoenix.

■ The latest version is "Revision 6.3” published

in January 2019!

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SLIDE 8

CS 423: Operating Systems Design

ACPI Global States

8

■ G0: working ■ G1: Sleeping and hibernation (several degrees available) ■ G2:, Soft Off: almost the same as G3 Mechanical Off,

except that the power supply still supplies power, at a minimum, to the power button to allow wakeup. A full reboot is required.

■ G3, Mechanical Off: The computer's power has been

totally removed via a mechanical switch (as on the rear

  • f a power supply unit).
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SLIDE 9

CS 423: Operating Systems Design

ACPI Global States

9

■ G0: working ■ G1: Sleeping and hibernation (several degrees available) ■ G2:, Soft Off: almost the same as G3 Mechanical Off,

except that the power supply still supplies power, at a minimum, to the power button to allow wakeup. A full reboot is required.

■ G3, Mechanical Off: The computer's power has been

totally removed via a mechanical switch (as on the rear

  • f a PSU).
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SLIDE 10

CS 423: Operating Systems Design 10

ACPI “Sleep” States

C-States:

■ C0: is the operating state. ■ C1 (often known as Halt): is a state where the processor is

not executing instructions, but can return to an executing state instantaneously. All ACPI-conformant processors must support this power state.

■ C2 (often known as Stop-Clock): is a state where the

processor maintains all software-visible state, but may take longer to wake up. This processor state is optional.

■ C3 (often known as Sleep) is a state where the processor

does not need to keep its cache, but maintains other state. This processor state is optional.

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SLIDE 11

CS 423: Operating Systems Design 11

C-States:

■ C0: is the operating state. ■ C1 (often known as Halt): is a state where the processor is

not executing instructions, but can return to an executing state instantaneously. All ACPI-conformant processors must support this power state.

■ C2 (often known as Stop-Clock): is a state where the

processor maintains all software-visible state, but may take longer to wake up. This processor state is optional.

■ C3 (often known as Sleep) is a state where the processor

does not need to keep its cache, but maintains other state. This processor state is optional.

ACPI “Sleep” States

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SLIDE 12

CS 423: Operating Systems Design 12

ACPI Proc Performance States

P-States:

■ P0 max power and frequency ■ P1 less than P0, voltage/frequency scaled ■ P2 less than P1, voltage/frequency scaled ■ ... ■ Pn less than P(n-1), voltage/frequency scaled

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SLIDE 13

CS 423: Operating Systems Design

Power of Computation

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■ Terminology

■ R : Power spent on computation ■ V : Processor voltage ■ f : Processor clock frequency ■ R0 : Leakage power

■ Power spent on computation is:

■ R = kv V 2f +R0

where kv is a constant (relates to capacitance)

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SLIDE 14

CS 423: Operating Systems Design

Energy of Computation

14

■ Power spent on computation is:

■ R = kv V 2f +R0

■ Consider a piece of computation of length C

clock cycles and a processor operating at frequency f

■ The execution time is t = C/f ■ Energy spent is:

■ E = R t = (kv V 2f +R0)(C/f )

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SLIDE 15

CS 423: Operating Systems Design

Reducing Processor Frequency

15

■ Power spent on computation is:

■ R = kv V 2f +R0

■ Energy spent is:

■ E = R t = (kv V 2f +R0)(C/f )

■ Question:

■ Does it make sense to operate the processor at a

reduced speed to save energy? Why or why not?

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SLIDE 16

CS 423: Operating Systems Design 16

Is reducing processor frequency good or bad?

■ Does it make sense to operate the processor at a

reduced speed to save energy? Why or why not?

Possible Answer: E = R t = (kv V 2f +R0)(C/f ) = kv V 2C +R0C/f

■ Conclusion: E is minimum when f is maximum.

à Operate at top speed

■ Is this really true? What are the underlying

assumptions?

Reducing Processor Frequency

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SLIDE 17

CS 423: Operating Systems Design

Dynamic Voltage Scaling (DVS)

17

Reducing voltage and frequency:

■ In reality, processor voltage can be decreased if

clock frequency is decreased

■ Voltage and frequency can be decreased roughly

proportionally.

■ In this case (where V ~ f ):

R = kf f 3 +R0 E = (kf f 3 +R0)(C/f) = kf f 2C +R0C/f

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SLIDE 18

CS 423: Operating Systems Design

Dynamic Voltage Scaling (DVS)

18

Reducing voltage and frequency:

■ In reality, processor voltage can be decreased if

clock frequency is decreased

■ Voltage and frequency can be decreased roughly

proportionally.

■ In this case (where V ~ f ):

R = kf f 3 +R0 E = (kf f 3 +R0)(C/f) = kf f 2C +R0C/f

■ Question: Does reducing frequency (and voltage) increase

  • r decrease total energy spent on a task?
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SLIDE 19

CS 423: Operating Systems Design 19

Dynamic Voltage Scaling (DVS)

■ Answer: there exists a minimum frequency

below which no energy savings are achieved E = kf f 2C +R0C/f dE/df = 2kf f C – R0C/f 2 = 0

■ Dynamic Voltage Scaling: We selectively

‘undervolt’ the processor to maximize power savings (or performance).

3

2

f

k R f =

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CS 423: Operating Systems Design 20

Linux CPUFreq Governor

■ Linux defines multiple DVS modes (called

CPUfreq “governors”):

■ Performance (highest frequency) ■ Powersave (lowest frequency) ■ Userspace (“root” user controls frequency) ■ OnDemand (adaptively change frequency

depending on load)

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CS 423: Operating Systems Design 21

  • Yes. Run at minimum

frequency.

  • No. Run at max

frequency.

  • Yes. Find Critical

F r e q u e n c y t h a t minimizes energy…

Dynamic Voltage Scaling (DVS)

When should we perform dynamic voltage scaling?

Can reduce Frequency and Voltage Can reduce Frequency, but Voltage is Fixed

DVS?

When processor is idle, it has option to sleep When processor is idle, it must stay awake When processor is idle, it has option to sleep

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SLIDE 22

CS 423: Operating Systems Design

Accounting for Off-chip

22

■ In the preceding discussion, we assumed that

task execution time at frequency f is C/f, where C is the total cycles needed

■ In reality some cycles are lost waiting for

memory access and I/O (Off-chip cycles).

■ Let the number of CPU cycles used be Ccpu and the

time spent off-chip be Coff-chip

■ Execution time at frequency f is given by

Ccpu /f + Coff-chip

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SLIDE 23

CS 423: Operating Systems Design

Question

23

DVS throttles P-States… but how do we know when to sleep?

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CS 423: Operating Systems Design

The Cost of Wakeup

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■ Turning Processor off… ■ Energy expended on wakeup, Ewake ■ To sleep or not to sleep?

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CS 423: Operating Systems Design

The Cost of Wakeup

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■ Turning Processor off… ■ Energy expended on wakeup, Ewake ■ To sleep or not to sleep?

■ Not to sleep (for time t):

Eno-sleep = (kv V 2f +R0) t

■ To sleep (for time t) then wake up:

Esleep = Psleep t + Ewake

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SLIDE 26

CS 423: Operating Systems Design

The Cost of Wakeup

26

■ Turning Processor off… ■ Energy expended on wakeup, Ewake ■ To sleep or not to sleep?

■ Not to sleep (for time t):

Eno-sleep = (kv V 2f +R0) t

■ To sleep (for time t) then wake up:

Esleep = Psleep t + Ewake

■ To save energy by sleeping: Esleep < Eno-sleep

sleep v wake

P R f V k E t − + >

2

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SLIDE 27

CS 423: Operating Systems Design

The Cost of Wakeup

27

■ Turning Processor off… ■ Energy expended on wakeup, Ewake ■ To sleep or not to sleep?

■ Not to sleep (for time t):

Eno-sleep = (kv V 2f +R0) t

■ To sleep (for time t) then wake up:

Esleep = Psleep t + Ewake

■ To save energy by sleeping: Esleep < Eno-sleep

sleep v wake

P R f V k E t − + >

2

Minimum sleep interval

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SLIDE 28

CS 423: Operating Systems Design

Dynamic Power Mgmt

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■ DPM refers to turning devices off (or putting

them in deep sleep modes)

■ Device wakeup has a cost that imposes a

minimum sleep interval (a breakeven time)

■ DPM must maximize power savings due to

sleep while maintaining schedulability

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CS 423: Operating Systems Design

Question

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How does dynamic power management affect scheduling?

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CS 423: Operating Systems Design

DPM

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The Problem with work-conserving scheduling:

Task 1 (C=2, P=12) Task 2 (C=1, P=16)

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CS 423: Operating Systems Design

DPM

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The Problem with work-conserving scheduling:

Task 1 (C=2, P=12) Task 2 (C=1, P=16) Minimum sleep period

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SLIDE 32

CS 423: Operating Systems Design

DPM

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The Problem with work-conserving scheduling:

Task 1 (C=2, P=12) Task 2 (C=1, P=16) Minimum sleep period

No opportunity to sleep! : - (

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SLIDE 33

CS 423: Operating Systems Design

DPM

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The Problem with work-conserving scheduling:

Task 1 (C=2, P=12) Task 2 (C=1, P=16) Minimum sleep period

Solution: Must batch!

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CS 423: Operating Systems Design

DVS on Multiple Procs

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■ From the perspective of minimizing energy, is

it always a good idea to use up all processors?

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SLIDE 35

CS 423: Operating Systems Design

How many proc to use?

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■ Consider using one processor at frequency f

versus two at frequency f/2

■ Case 1: Total power for one processor

■ kf f 3+R0

■ Case 2: Total power for two processors

■ 2 {kf (f /2)3 +R0} = kf f 3/ 4 + 2 R0

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SLIDE 36

CS 423: Operating Systems Design

How many proc to use?

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■ Consider using one processor at frequency f

versus two at frequency f/2

■ Case 1: Total power for one processor

■ kf f 3+R0

■ Case 2: Total power for two processors

■ 2 {kf (f /2)3 +R0} = kf f 3/ 4 + 2 R0

■ The general case: n processors

■ n {kf (f /n)3 +R0} = kf f 3/ n 2 + n R0

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CS 423: Operating Systems Design

How many proc to use?

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■ The general case: n processors

■ Power = n {kf (f /n)3 +R0} = kf f 3/ n 2 + n R0 ■ dPower/dn = -2 kf f 3/ n 3 + R0 = 0

■ What if n is not an integer? 3 3

2 R f k n

f

=

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CS 423: Operating Systems Design 38

Example:

■ A processor uses 10mW when running at full

speed and 3mW when running at half speed. How much energy is saved, if any, at half speed? (If energy, in fact, increases, use a negative sign to indicate “negative savings”)

Dynamic Voltage Scaling (DVS)