Global Instruction Selection A Proposal Quentin Colombet Apple - - PowerPoint PPT Presentation

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Global Instruction Selection A Proposal Quentin Colombet Apple - - PowerPoint PPT Presentation

Aug 23, 2022 520 likes •1.35k views

Global Instruction Selection A Proposal Quentin Colombet Apple What Is Instruction Selection? Translation from target independent intermediate representation (IR) to target specific IR. LLVM IR -> MachineInstr 2 SelectionDAG (SD) ISel

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SLIDE 1

Global Instruction Selection

Quentin Colombet Apple

A Proposal

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SLIDE 2

What Is Instruction Selection?

Translation from target independent intermediate representation (IR) to target specific IR. LLVM IR -> MachineInstr

2

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SLIDE 3

SelectionDAG (SD) ISel

MachineInstr LLVM IR FastISel

Fail FastPath

SDBuilder DAGCombiner Legalize* DAGCombiner Select Schedule

GoodPath

Target

Hooks

SDNode

3

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SLIDE 4

SelectionDAG (SD) ISel

LLVM IR (-> SDNode) -> MachineInstr MachineInstr LLVM IR FastISel

Fail FastPath

SDBuilder DAGCombiner Legalize* DAGCombiner Select Schedule

GoodPath

Target

Hooks

SDNode

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SLIDE 5

Problems with SDISel

  • Basic block scope
  • SDNode IR, specific to instruction selection
  • Monolithic

4

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SLIDE 6

Goals

  • Global
  • Fast
  • Shared code for fast and good paths
  • IR that represents ISA concepts better
  • More flexible pipeline
  • Easier to maintain/understand
  • Self contained representation
  • No change to LLVM IR

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SLIDE 7

Non-Goals for the Prototype

  • Reuse of InstCombine
  • Improve TableGen
  • Support target specific features

6

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SLIDE 8

Why Not Fix SDISel?

  • Hard limitations of the underlying representation
  • Would introduce SDNode IR to optimizers
  • SDNode IR can be avoided
  • Inherent overhead

7

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SLIDE 9

Global ISel

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SLIDE 10

LLVM IR

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SLIDE 11

IRTranslator LLVM IR

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SLIDE 12

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }

  • LLVM IR to generic (G) MachineInstr

10

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SLIDE 13

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res } foo: val = VMOVDRR R0,R1 addr = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • Virtual registers have a size
  • ABI lowering

10

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SLIDE 14

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res } foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • Virtual registers have a size
  • ABI lowering

10

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SLIDE 15

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res } foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded = gLD addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • Virtual registers have a size
  • ABI lowering

10

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SLIDE 16

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded = gLD addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

New

10

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SLIDE 17

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW New

10

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SLIDE 18

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 19

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 20

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res } foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 21

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res } foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 22

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res } foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded = and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 23

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res } foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 24

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val(64) = … R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 25

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val(64) = … R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = … R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 27

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 28

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

NEW NEW

10

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SLIDE 29
  • LLVM IR to generic (G) MachineInstr
  • One IR instruction to 0..* (G) MachineInstr
  • MachineInstrs get a type
  • Virtual registers get a size
  • ABI lowering

IRTranslator

define double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW NEW

10

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SLIDE 30

IRTranslator LLVM IR

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

11

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SLIDE 31

IRTranslator (G)MI LLVM IR

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

11

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SLIDE 32

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

Legalizer IRTranslator (G)MI LLVM IR

11

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SLIDE 33

Legalizer

  • No illegal types, just illegal operations
  • Illegal (G)MachineInstr to legal (G)MachineInstr
  • State expressed in the IR
  • Iterative process
  • Set of transformations
  • Loop until no more changes

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

12

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SLIDE 34

Legalizer

  • No illegal types, just illegal operations
  • Illegal (G)MachineInstr to legal (G)MachineInstr
  • State expressed in the IR
  • Iterative process
  • Set of transformations
  • Loop until no more changes

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

12

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SLIDE 35

Legalizer

  • No illegal types, just illegal operations
  • Illegal (G)MachineInstr to legal (G)MachineInstr
  • State expressed in the IR
  • Iterative process
  • Set of transformations
  • Loop until no more changes

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

12

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SLIDE 36

Legalizer

  • No illegal types, just illegal operations
  • Illegal (G)MachineInstr to legal (G)MachineInstr
  • State expressed in the IR (extract, build_sequence)
  • Iterative process
  • Set of transformations
  • Loop until no more changes

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

12

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SLIDE 37

Legalizer

  • No illegal types, just illegal operations
  • Illegal (G)MachineInstr to legal (G)MachineInstr
  • State expressed in the IR (extract, build_sequence)
  • Iterative process
  • Set of transformations
  • Iterate until no more changes

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW NEW

12

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SLIDE 38

Legalizer

  • No illegal types, just illegal operations
  • Illegal (G)MachineInstr to legal (G)MachineInstr
  • State expressed in the IR (extract, build_sequence)
  • Iterative process
  • Set of transformations
  • Iterate until no more changes

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW NEW

12

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SLIDE 39

Legalizer

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • Introduce a “LegalizerToolkit” for (custom) lowering
  • f legalization

NEW

13

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SLIDE 40

Legalizer

  • Introduce a “LegalizerToolkit” for (custom) lowering
  • f legalization

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

13

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SLIDE 41

Legalizer IRTranslator (G)MI LLVM IR

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

14

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SLIDE 42

Legalizer RegBank IRTranslator (G)MI LLVM IR

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

Select

NEW

14

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SLIDE 43

Select RegBank

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

15

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SLIDE 44

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • Assign virtual registers to register bank
  • Avoid cross domain penalties
  • Aware of register pressure

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

RegBank Select

15

slide-45
SLIDE 45
  • Assign virtual registers to register bank
  • Avoid cross domain penalties
  • Aware of register pressure

foo: val(FPR,64) = VMOVDRR R0,R1 addr(GPR,32) = COPY R2 loaded(FPR,64) = gLD (double) addr lval(GPR,32),hval(GPR,32) = VMOVRRD val low(GPR,32),high(GPR,32) = VMOVRRD loaded land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and(FPR,64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

RegBank Select

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

15

slide-46
SLIDE 46

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> [{(FPR,0xFF…FF),1},{(GPR,0xFF..00)(GPR,0x00..FF),0}]

NEW

RegBank Select

16

slide-47
SLIDE 47
  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> [{(FPR,0xFF…FF),1},{(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}]

NEW

RegBank Select

16

slide-48
SLIDE 48
  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> [{(FPR,0xFF…FF),1},{(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}] {(FPR,0xFF…FF),1} {(GPR,0xFF..00)(GPR,0x00..FF),0}

NEW

RegBank Select

16

slide-49
SLIDE 49
  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> [{(FPR,0xFF…FF),1},{(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}] {(FPR,0xFF…FF),1} {(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}

NEW

RegBank Select

16

slide-50
SLIDE 50
  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> [{(FPR,0xFF…FF),1},{(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}] {(FPR,0xFF…FF),1} {(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}

NEW

RegBank Select

16

slide-51
SLIDE 51
  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

RegBank Select

16

slide-52
SLIDE 52
  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

RegBank Select

16

slide-53
SLIDE 53
  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

RegBank Select

16

slide-54
SLIDE 54

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

NEW

RegBank Select

16

slide-55
SLIDE 55

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = COPIES loaded1,loaded2 land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

NEW

RegBank Select

16

slide-56
SLIDE 56

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = COPIES loaded1,loaded2 land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>

  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

NEW

RegBank Select

16

slide-57
SLIDE 57

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = COPIES loaded1,loaded2 land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

NEW

RegBank Select

16

slide-58
SLIDE 58

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = COPIES loaded1,loaded2 land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

  • RegBankSelect:
  • Asks the target what register banks are supported

for a given opcode

  • Assigns register banks to avoid cross bank copies
  • May use the LegalizerToolkit to change the code

NEW

RegBank Select

16

slide-59
SLIDE 59

RegBank IRTranslator (G)MI LLVM IR Legalizer Select

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

17

slide-60
SLIDE 60

RegBank IRTranslator (G)MI LLVM IR Legalizer Select

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

Select

17

slide-61
SLIDE 61

Select

  • (G)MachineInstr to MachineInstr
  • Loop until everything is selected
  • State expressed in the IR.
  • In-place morphing.
  • State machine.

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

18

slide-62
SLIDE 62

Select

  • (G)MachineInstr to MachineInstr
  • In-place morphing
  • State expressed in the IR
  • State machine
  • Loop until everything is selected

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

NEW

18

slide-63
SLIDE 63
  • (G)MachineInstr to MachineInstr
  • In-place morphing
  • State expressed in the IR
  • State machine
  • Iterate until everything is selected
  • Combines across basic blocks

Select

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

NEW

18

slide-64
SLIDE 64

Select

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = t2ANDrr (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

  • (G)MachineInstr to MachineInstr
  • In-place morphing
  • State expressed in the IR
  • State machine
  • Iterate until everything is selected
  • Combines across basic blocks

NEW

18

slide-65
SLIDE 65

Select

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = t2ANDrr (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

  • (G)MachineInstr to MachineInstr
  • In-place morphing
  • State expressed in the IR
  • State machine
  • Iterate until everything is selected
  • Combines across basic blocks

NEW NEW

18

slide-66
SLIDE 66

Select

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = t2LDRi12 (i32) addr loaded2(GPR,32) = t2LDRi12 (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = t2ANDrr (i32) lval, low hand(GPR,32) = t2ANDrr (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

  • (G)MachineInstr to MachineInstr
  • In-place morphing
  • State expressed in the IR
  • State machine
  • Iterate until everything is selected
  • Combines across basic blocks

NEW NEW NEW

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SLIDE 67

Select

foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use> foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = t2LDRi12 (i32) addr loaded2(GPR,32) = t2LDRi12 (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = t2ANDrr (i32) lval, low hand(GPR,32) = t2ANDrr (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>

  • (G)MachineInstr to MachineInstr
  • In-place morphing
  • State expressed in the IR
  • State machine
  • Iterate until everything is selected
  • Combines across basic blocks

NEW NEW NEW

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SLIDE 68

(G)MI Legalizer RegBank Select Select IRTranslator LLVM IR

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SLIDE 69

(G)MI Legalizer RegBank Select Select IRTranslator LLVM IR MI

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SLIDE 70

Summary

MI (G)MI Legalizer RegBank Select Select IRTranslator LLVM IR

20

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SLIDE 71

Summary

Legalizer RegBank Select MI Select (G)MI IRTranslator LLVM IR

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SLIDE 72

Summary

Opt Legalizer RegBank Select MI Select (G)MI IRTranslator LLVM IR

20

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SLIDE 73

Summary

Legalizer RegBank Select MI Select (G)MI IRTranslator LLVM IR

20

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SLIDE 74

Summary

Opt Legalizer RegBank Select MI Select (G)MI IRTranslator LLVM IR

20

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SLIDE 75

Summary

Legalizer RegBank Select MI Select (G)MI IRTranslator LLVM IR

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SLIDE 76

Summary

Opt Legalizer RegBank Select MI Select (G)MI IRTranslator LLVM IR

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SLIDE 77

Summary

Legalizer Toolkit

Can use

Target

Hooks Can tune Hooks

Legalizer RegBank Select MI Select (G)MI IRTranslator LLVM IR

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SLIDE 78

Global ISel

  • Work at function scope
  • Global
  • Break down the process in passes
  • More flexible pipeline
  • Easier to understand/maintain
  • Shared code for fast and good paths
  • Introduce new generic opcodes for MachineInstr
  • Fast
  • IR that represents ISA concepts better
  • No change to LLVM IR
  • Self contained machine representation

MI (G)MI Legalizer RegBank Select Select IRTranslator LLVM IR

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SLIDE 79
  • 1. Start of prototyping
  • Perform the translation
  • Lower the ABI
  • Complex instructions are not supported
  • 2. Basic selector
  • Abort on illegal types
  • Selector patterns written in C++
  • Simple bank selection
  • 3. Simple legalization
  • Scalar operations
  • Some vector operations

End of prototyping

How Do We Get There?

  • 1. Rename the SDISel into LegacyISel

1 2 2 3 1 MI (G)MI Legalizer RegBank Select Select IRTranslator LLVM IR MI Legalizer RegBank Select Select

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SLIDE 80

Then What?

  • Productize on what we learnt
  • Discuss timeline to remove:
  • SDISel, FastISel
  • CodeGenPrepare, ConstantHoisting
  • ExeDepsFix, PeepholeOptimizer
  • Present a status report next year

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SLIDE 81

References

  • Jakob’s initial proposal for global-isel:


http://lists.llvm.org/pipermail/llvm-dev/2013- August/064696.html

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SLIDE 82

Questions?