Gated Silicon Nanowires for Thermoelectric Applications Emilio - - PowerPoint PPT Presentation
Gated Silicon Nanowires for Thermoelectric Applications Emilio Codecido Mentor: Ben Curtin Faculty: John Bowers, Electrical and Computer Engineering UCLEADS, UC Santa Barbara 08-22-2012 for Applications Emilio
Emilio Codecido Mentor: Ben Curtin Faculty: John Bowers, Electrical and Computer Engineering UCLEADS, UC Santa Barbara 08-22-2012
Emilio Codecido Mentor: Ben Curtin Faculty: John Bowers, Electrical and Computer Engineering UCLEADS, UC Santa Barbara 08-22-2012
Power Factor Thermal conductivity Thermal conductivity
Carrier mobility Carrier charge Carrier density
N-type doped silicon
mobility charge density
Gate (conductor)
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + Pure Si nanowire Insulator
Top View
Seebeck: Electrical Conductivity:
Heat Source Gate Nanowire
10 μm
4 probes resistance measurement Thermometers and voltage pins
Seebeck:
89.0 89.3 89.5 89.8 90.0 90.3 90.5 90.8 91.0 91.3 91.5 165.5 166.0 166.5 167.0 167.5 168.0 168.5 169.0 169.5 170.0 170.5 23 24 25 26 27 28 29 30 31 32 33 Resistance 2 (Ohm) Resistance 1 (Ohm) Lines Temperature (°C) Line 1 Line 2
Seebeck:
1 mm 10 μm
0.00 1.00 2.00 3.00 4.00 5.00 6.00 7.00 0.02 0.04 0.06 0.08 0.1 0.12 0.14
∆T (K) Heater Current (A)
∆T vs. Heater Current
run 1 run 2 0.00E+00 2.00E-04 4.00E-04 6.00E-04 8.00E-04 1.00E-03 1.20E-03 1.40E-03 0.02 0.04 0.06 0.08 0.1 0.12 0.14
∆V (V) Heater Current (A)
∆V vs. Heater Current
run 1 run 2
Remember, measuring silicon sheet, not silicon nanowires… Seebeck:
0.00E+00 2.00E-04 4.00E-04 6.00E-04 8.00E-04 1.00E-03 1.20E-03 1.40E-03 1 2 3 4 5 6 7
|∆V| (V) ∆T (K)
Seebeck: ∆V vs. ∆T
run 1 run 2
Emilio Codecido Mentor: Ben Curtin Faculty: John Bowers, Electrical and Computer Engineering UCLEADS, UC Santa Barbara 08-22-2012