Finite State Machines CS 3410 Computer System Organization & - - PowerPoint PPT Presentation

▶
finite state machines
SMART_READER_LITE
LIVE PREVIEW

Finite State Machines CS 3410 Computer System Organization & - - PowerPoint PPT Presentation

Oct 31, 2023 207 likes •480 views

Finite State Machines CS 3410 Computer System Organization & Programming [K. Bala, A. Bracy, E. Sirer, and H. Weatherspoon] Stateful Components Combinational logic Output computed directly from inputs System has no internal state

slide-1
SLIDE 1

Finite State Machines

CS 3410 Computer System Organization & Programming

[K. Bala, A. Bracy, E. Sirer, and H. Weatherspoon]

slide-2
SLIDE 2

Stateful Components

Combinational logic

  • Output computed directly from inputs
  • System has no internal state
  • Nothing depends on the past!

Need:

  • to record data
  • to build stateful circuits
  • a state-holding device

Enter: Sequential Logic & Finite State Machines

2

Inputs Combinational circuit Outputs N M

slide-3
SLIDE 3

Finite State Machines

An electronic machine which has

  • external inputs
  • externally visible outputs
  • internal state

Output and next state depend on

  • inputs
  • current state

3

slide-4
SLIDE 4

Automata Model

Finite State Machine

  • inputs from external world
  • outputs to external world
  • internal state
  • combinational logic

4

Next State Current State Input Output

Registers Comb. Logic

slide-5
SLIDE 5

FSM Example

5

Legend

state

input/output

start state

A B

0/0 1/0 0/0 1/1

Input: 1 or 0 Output: 1 or 0 States: A or B

What input pattern is the FSM “looking for”?

[Mealy Machine]

state

slide-6
SLIDE 6

Mealy Machine

General Case: Mealy Machine Outputs and next state depend on both current state and input

6

Next State Current State Input Output

Registers Comb. Logic

slide-7
SLIDE 7

Moore Machine

Outputs depend only on current state

7

Next State Current State Input Output

Registers Comb. Logic Comb. Logic

A B

1 1 Legend

state

  • ut

input

state

  • ut

C 1

1

start state

slide-8
SLIDE 8

xkcd

8

slide-9
SLIDE 9

Why FSMs?

They help us reason about complex behavior.

9

https://learnyousomeerlang.com/finite-state-machines barks wags tail sits gets petted waits g e t s p e t t e d sees squirrel

Clicker Question: What kind of machine is this? (A) Mealy (B) Moore (C) Neither

doesn’t give a crap about you a n y e v e n t e v e r !

slide-10
SLIDE 10

Other FSMs

10

Tennis

https://www.c-sharpcorner.com/article/understanding-state-design-pattern-by-implementing-finite-state/

http://blog.mikemccandless.com/201 4/08/scoring-tennis-using-finite- state.html

slide-11
SLIDE 11

Add two infinite input bit streams

  • streams sent with least-significant-bit (lsb) first

Clicker Question: How many states are needed to represent this FSM? (a) 0 (d) 3 (b) 1 (e) 4 (c) 2

Activity: Build a Circuit for a Serial Adder

11

…10110 …01111 …00101

slide-12
SLIDE 12

Strategy for Building an FSM

(1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit

12

slide-13
SLIDE 13

Step 1: State Diagram

13

…10110 …01111 …00101

S0 States: Inputs: a and b (drawn as 2-bit input ab) Output: z

Legend

state

input/output

start state state

slide-14
SLIDE 14

Strategy for Building an FSM

(1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit

15

slide-15
SLIDE 15

Step 2: Output & Next State Tables

16

a b Curr State s z Next State s’

slide-16
SLIDE 16

Strategy for Building an FSM

(1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit

18

slide-17
SLIDE 17

Step 3: Create Bit Encoding

19

Encode states as bits S0 = S1 = 2 states à 1-bit enough

a b Curr State s z Next State s’

Copy from previous Make a binary encoding instead of names

(1-hot also an option)

slide-18
SLIDE 18

Strategy for Building an FSM

(1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit

21

slide-19
SLIDE 19

Step 4: Create Logic Equations

22

Determine logic equations for next state and

  • utputs

s’ = z =

slide-20
SLIDE 20

Strategy for Building an FSM

(1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit: Simplify first!

24

slide-21
SLIDE 21

Step 5: Draw the Circuit

25

Current State a b

D Q

s z s' s' Next State Output

slide-22
SLIDE 22

FSMs in a Processor?

  • multi-cycle (non-pipelined) processor

27

slide-23
SLIDE 23

FSMs in a Processor?

  • multi-cycle (non-pipelined) processor
  • handling cache misses, branch mispredictions,

interrupts

  • tracking the state of data in your cache (cache

coherency)

28

slide-24
SLIDE 24

29

Consider a finite state machine that takes two inputs, A and B, and generates a single output, Z. Inputs are unsigned binary numbers, entered into the FSM one digit at a time, beginning with the most significant digit. The output, Z, should be the larger of the two numbers. Example: A = 1000 and B = 0101, then Z = 1000 (the value of A). Draw the state transition diagram (states & arrows) that expresses this

  • FSM. Use the notation AB for inputs (10 means A = 1 and B = 0).

(1) Draw a state diagram (2) Write output and next-state tables (3) Encode states, inputs, and outputs as bits (4) Determine logic equations for next state and outputs (5) Draw the circuit

slide-25
SLIDE 25

30

Clicker Question: How many states are needed to represent this FSM? (a) 0 (d) 3 (b) 1 (e) 4 (c) 2