Event announcement Topic: Thermal-Aware Design of 2D/3D Many-Core - - PowerPoint PPT Presentation

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Event announcement Topic: Thermal-Aware Design of 2D/3D Many-Core - - PowerPoint PPT Presentation

Event announcement Topic: Thermal-Aware Design of 2D/3D Many-Core Servers with Inter- Tier Liquid Cooling Speaker: Prof. David Atienza, cole polytechnique fdrale de Lausanne (EPFL), Switzerland Time/Location: Monday, July 7th, 16:00,


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Event announcement

Topic: Thermal-Aware Design of 2D/3D Many-Core Servers with Inter- Tier Liquid Cooling Speaker:

  • Prof. David Atienza, École polytechnique fédérale de Lausanne

(EPFL), Switzerland Time/Location: Monday, July 7th, 16:00, Room H120 Technologiefabrik

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Bachelor/Master Thesis:

Build your own manycore System-On-Chip

  • FPGAs
  • Network on Chip
  • Verilog
  • SystemC
  • Qt

OptimSoc http://www.optimsoc.org/ DFG SPP 1500 Dependable Embedded Systems http://spp1500.itec.kit.edu/ ZTEX FPGA Module 1.15

src: http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html

interested? volker.wenzel@kit.edu

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Dennard Scaling and Power

  • see blackboard
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The end of Moore's law?

src: http://en.wikipedia.org/wiki/Moore%27s_law

„Prediction is very difficult, especially about the future.“

Niels Bohr (1885 - 1962)

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Aging Mechanisms in Integrated Circuits

probabilistic empirical physical Aging Phenomena

src: de.wikipedia.org/wiki/Tesla-Transformator src:de.wikipedia.org/wiki/ Entropie_Thermodynamik

2nd law of thermodynamics

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Aging Mechanisms in Integrated Circuits

  • Electromigration (EM)
  • Negative Bias Temperature Instability (NBTI)
  • Hot Carrier Degradation (HCID)
  • Time Dependent Dielectric Breakdown (TDDB)
  • Soft Errors
  • Process Variation
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Electromigration What is it?

  • very old reliability concern
  • physical migration of atoms

through current

  • „electron wind“ = momentum

transfer of electrons to atoms/ions

  • affects metal-interconnects
  • power and ground wires (DC

current flow)

  • voids (internal failure)
  • hillocks (hillock failure)

src: http://en.wikipedia.org/wiki/Electromigration

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Electromigration How to model EM?

  • Black's equation (empirical

model)

– A constant – j current density – n parameter – Q activation energy in eV – k Boltzmann constant – T temperature in K

  • Homework Challenge: Derive

standard deviation of Black's equation.

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Electromigration How to deal with EM?

  • copper better than

aluminium for inter- connects

  • design rules
  • TCAD Simulation of

wires

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NBTI: Preparation Threshold Voltage

src:http://en.wikipedia.org/wiki/Threshold_voltage

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NBTI: Preparation Hydrogen?

  • Hydrogen-terminated silicon surface
  • chemical passivation for silicon substrate
  • remove natural SiO

2 surface

  • terminate dangling bonds
  • realized by treatment with HF
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NBTI What is it?

  • = Negative bias temperature instability
  • mainly p-channel MOSFETs
  • increases Vth over long periods of time (years)
  • decreasing transconductance, linear drain current,

saturation current, channel mobility,...

  • stress means

– negative gate voltages – at elevated temperatures

  • signal probability (SP) important

parametric degradation

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NBTI

Breaking Bonds

  • Model 1: Reaction-Diffusion

– breaking of SiH at SiO2/Si

substrate interface

– H diffuses away

  • Model 2: Charge Trapping
  • creation of

– interface traps

(permanent traps)

– oxide traps

(can recover)

src:http://www.iue.tuwien.ac.at/phd/entner/ Quiz: How could you check if the hydrogen at the Si surface is really responsible for NBTI?

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NBTI

Breaking Bonds

src: [Schro04]

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NBTI shift of threshold voltage

  • power law time

dependence

– initially quick degradation

& recovery

  • Arrhenius law

temperature dependence

  • highly device-dependent
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effect on latch:

  • reduced SNM
  • increased switching

time

NBTI

impact on different electronic components

effect on SRAM:

  • reduced SNM

effect on logic gate:

  • increased delay

effect on ring

  • scillator:
  • frequency

deterioration

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NBTI

„Have you tried turning it off and on again?“

  • NBTI recovers (partially)
  • makes measurement

difficult

  • mitigation techniques
  • NBTI depends on

– voltage stress – signal probability – temperature Vth shift [V] Time

Stress Recovery

Vg [V]

  • 1
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Static Noise Margin: a 6-T SRAM cell...

src:http://www.iue.tuwien.ac.at/phd/entner/node34.html

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Static Noise Margin What are Butterfly Curves?

  • Voltage Transfer

Curve (VTC)

  • SNM is length of

biggest square

  • SNM quantifies

resiliency to noise

src:http://www.iue.tuwien.ac.at/phd/entner/node34.html

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Static Noise Margin What are Butterfly Curves?

NBTI decreases SNM

src:http://www.iue.tuwien.ac.at/phd/entner/node34.html

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Hot Carrier Degradation What is HCID?

  • acceleration of carriers

(electrons/holes) under lateral electric fields

  • hot electrons cause

damage

  • dependent on

– supply voltage – channel geometry src: http://www.iue.tuwien.ac.at/phd/entner

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Hot Carrier Degradation Maxwell Boltzmann Distribution

  • electrons at right tail

causing damage in device

– „hot electrons“ – „lucky electrons“ – electrons w/ high

kinetic energy

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Time Dependent Dielectric Breakdown

What is TDDB?

  • old reliability concern
  • degrade oxide layer's insulating property

by breaking of Si-O bonds

  • leads to excessive gate drain current
  • depends on

– dielectric thickness – manufacturing quality of gate oxide

src:images.nationalgeographic.com

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Time Dependent Dielectric Breakdown What is TDDB?

src: https://nanohub.org/resources/17208/download/2013.03.01-ECE695A-L21.pdf BINGO!

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Time Dependent Dielectric Breakdown What is TDDB?

  • more recent: breakdown ist not instantaneous

hard breakdown vs. soft breakdown aka Progressive Breakdown

  • degrade drain current by 10%
  • shift threshold voltage by 75mV

(like NBTI, but without recovery)

  • ref. „Circuit-level delay modeling considering both TDDB and NBTI“ (Yu Cao)
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What is TDDB? Mitigation

  • TDDB is Voltage Accelerated Process

(Reducing gate voltage helps)

  • Power gated circuits do not degrade from TDDB.
  • Soft breakdown can partially be tolerated in thin
  • xides
  • Thickness of gate oxide, voltage chosen at

transistor design time for desired chip life time

  • Reducing Temperature helps
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Comparison of TDDB and NBTI

NBTI:

  • diffusion of H, H2 in gate/poly
  • creates traps in Si/SiO2

interface

  • recovery
  • shifts Vth
  • magnitude depends on duty

cycle aka signal probability

TDDB:

  • increases leakage
  • traditionally: hard

breakdown due to conducting channel in dielectric

  • no recovery
  • recently:soft/hard TDDB
  • shifts Vth
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Comparison of TDDB, NBTI, HCID

src: https://nanohub.org/resources/17208/download/2013.03.01-ECE695A-L21.pdf

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Conclusions

  • Electromigration
  • NBTI
  • Hot Carrier Injection
  • TDDB

Quiz: Which part affects what?

src: http://de.wikipedia.org/wiki/Metall-Oxid-Halbleiter-Feldeffekttransistor

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Sources

  • „Intrinsic Transistor Reliability Improvements from 22nm Tri-

Gate Technology“ Ramey, S. et al

  • „A Lifetime Projection Method Using Series Model and

Acceleration Factors for TDDB failures of Thin Gate Oxides“ Shiono, N. et al

  • „Method of Determining Reliability Screens for Time Dependent

Dielectric Breakdown“ Crook, D.L. et al

  • „Circuit Reliability: From Physics to Architectures.“ Fang, j. et al

(good overview, ICCAD 2012)

  • [Schro04] „Negative Bias temperature instability: What do we

understand?“ Dieter K. Schroder

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Sources

  • http://www.iue.tuwien.ac.at/phd/entner/
  • „Reliability Physics and Engineering: Time-To-

Failure Modeling.“ J. W. McPherson, Springer Science & Business Media, 2010