Evaluation of On-Chip Router Components in Spintronics Pierre - - PowerPoint PPT Presentation

Modeling and Power Evaluation of On-Chip Router Components in Spintronics

NOC Symposium, May 9th 2012, Lyngby, Denmark

Pierre Schamberger & Zhonghai Lu Xianyang Jiang Meikang Qui

• Dept. of Electronics Systems, School for ICT

Institute of Microelectronics and IT

• Dept. of ECE

KTH Royal Institute of Technology, Sweden Wuhan University, China University of Kentucky, USA

Agenda

• Spintronics
• Motivation
• Overview
• Magnetic Tunnel Junction (MTJ)
• Theory
• Research status
• Reading and Writing MTJs
• Switching energy
• Simulation model
• Results for on-chip routers components
• Buffers
• Crossbars

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

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Spintronics & MTJ

Magnetic Tunnel Junction

Spintronics ?

• Motivations:
• CMOS drawbacks
• Static current
• High dynamic current
• Routers become essentials
• Power consuming

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A new technology is required

• Spintronics:
• Tunneling effect
• Spin and magnetic moment of the electron vs charge
• Potential applications : Memory, Logic elements, …

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

• Sandwich structure:
• Ferromagnetic/Insulator/Ferromagnetic
• 2 States:
• Parallel & Anti-parallel (resp. 1 & 0)
• 2 Resistances (High & Low)
• Main parameter:
• Tunnel Magnetoresistance Ratio (TMR)
• Voltage dependency on the

resistance values

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𝑼𝑵𝑺 = 𝑺AP − 𝑺𝑸 𝑺𝑸

Magnetic Tunnel Junction (MTJ)

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

(1) (0)

• TMR up to 600%
• Material:
• Amorphous AlO barrier
• MgO crystal barrier
• Main parameters:
• Thickness of the free layer
• Thickness of the insulated layer

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MTJ: State of the Art

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

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Pros & Cons

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

Advantages Drawbacks

• Good integration
• Good scalability
• Power failure safe
• No static current
• Power stand-by
• Perturbations at high

concentration rate (MRAM)

• High switching (write)

energy

• 2 implementations:
• 2 MTJs
• 1 MTJ & 1 reference resistor

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MTJ: Read circuitry

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

Evaluation request

2 MTJ Mixed 1MTJ-1Resistor Logic “0” Logic “1”

𝑺𝑺𝑭𝑮 = 𝑺AP + 𝑺𝑸 𝟑

• Different switching methods:
• Spin-Torque Transfer (STT)
• Perpendicular magnetization

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MTJ: Write (Switching) circuitry

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

Switching power at 500MHz:

• Actual: 125µW
• Actual CMOS: 8µW
• Expected: 0.1µW
• 3 types of switching:
• Precessional Switching
• Dynamic Reversal
• Thermally Activated Switching
• 2011 results :

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Direction Energy Time Anti-parallel state to parallel state 0.286pJ 1.54ns Parallel state to Antiparallel state 0.706pJ 0.68ns

Switching energy

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

Simulation models and results

When applied to On-Chip Routers components

• Simulation choices:
• Reading power only
• Total power = reading power

+ writing power

• Reading model:
• Simple model : Variable resistance
• Corrected model :
• Writing power computation:
• Extrapolated from 1fJ/switching

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1 𝑆 = 1 𝑑 + 1 𝑏 ∗ exp −b. V

MTJ Model

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

Res value (Ω) Crossing voltage (V)

• 3 main parts:
• Arbiter
• Buffers
• Crossbar
• Speed:
• 500MHz – 2GHz
• Data width:
• Up to 128 bits

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On-chip router components

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Agenda Spintronics MTJ On-chip Components Conclusion

• CMOS Flip-flops
• Classic flip-flop model
• MTJ reader circuitry
• Random Access Type
• Only 1evaluation circuit/module
• 1 MTJ to store a each state

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Buffer implementation

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

• CMOS Flip-flops
• Classic flip-flop model
• MTJ reader circuitry
• Random Access Type
• Only 1evaluation circuit/module
• 1 MTJ to store a each state
• Branch transistor for depth>50

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Buffer implementation

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

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Buffer implementation: Results

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Switching probability: 50% Frequency: 250MHz Duty Cycle: 25% Switching energy (est.): 1fJ Full Power Consumption = Reading power + Switching power

Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

Key depth = 10

(over which the MTJ implementation is less power consuming)

Power saving = up to -56%

(Trend for deep buffer implementation, 56% of the CMOS power consumption is saved)

• CMOS implementation:
• Tri-state buffers
• CMOS Flip-flop for the control bits
• MTJ implementation 1:
• Tri-state buffers
• MTJ reader for the control bits

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Crossbar implementation

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion



CMOS Flip-flop: 0.6uW



MTJ reader: 2.27uW



Logic-In-Memory Mux: 2.5uW

• MTJ implementation 2:
• No CMOS tri-state buffer
• Logic-in-Memory device

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Crossbar implementation

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

• Spintronics
• About electron’s spin, not charge
• MTJ switching methods
• Energy magnitude vs. Switching speed
• MTJ reader concepts
• Resistance value comparison
• Buffer MTJ implementation
• Very scalable
• Power efficient
• Crossbar MTJ Implementation
• Hardly scalable
• Not yet power efficient
• Extensions
• Router Arbiter with MTJ
• Scalable Logic-in-Memory Multiplexer structure (Crossbar)

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Conclusion

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Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

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Questions

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Thank you for your attention! Any questions ?

Agenda Spintronics MTJ On-chip Buffer On-chip Crossbar Conclusion

Annexes

Magnetic Tunnel Junction

• DyCML:
• Dynamic Current Model Logic
• CCK:
• Cross-Coupled Keeper
• DCS:
• Dynamic current source

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Annex: MTJ Reader DyCML

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Annex: Crossbar Logic-in-Memory

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1,1 2,6 4,6 20 45 205 408 2,35 3,3 4,65 11,8 19,8 92,5 180 1 10 100 1000 1 10 100 1000 Power (uW) Size (in bits) P flip-flop P MTJ P MTJ (group)

Total Power = Using (reading) power + Switching power Switching probability : 50% Frequency : 250MHz Duty Cycle : 25% MTJ switching energy (est.) : 1fJ

Annex: Buffer impl. results

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• MTJ Arbiters
• Switching energy enhancements
• Resizing buffers more power efficiently
• Scalable Logic-in-Memory Multiplexer

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Annex: Extensions

2012-05-09