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Energy Efficient Content-Addressable Memory Advanced Seminar Computer Engineering Institute of Computer Engineering Heidelberg University Fabian Finkeldey 26.01.2016 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 1 Table of


  1. Energy Efficient Content-Addressable Memory Advanced Seminar Computer Engineering Institute of Computer Engineering Heidelberg University Fabian Finkeldey 26.01.2016 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 1

  2. Table of Contents • Introduction • Standard Circuit Design • Energy Efficient Design • Simulation • Implementation • Conclusion Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 2

  3. Introduction Use-Cases and basic design of content-addressable memory Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 3

  4. Example: Looking up a phone number • Problem: Find a name to a given phone number • Linear Search: • Looking up every entry in a phone book takes a lot of time... • A phonebook that can deliver a name to a given number is needed Ref. 3 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 4

  5. Example II: Translation Lookaside Buffer • TLB: Cache for address translation CPU • Typical size ~1024 entries Virtual Address • Faster than page table access TLB MMU • Needs to be searched: Physical Address • Search-key: Virtual Address Memory • Search-result: Physical Address Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 5

  6. Basic concept of a CAM 1 1 0 1 Search Word 1 0 1 0 0 1 0 0 0 0 Memory 1 1 0 1 1 0 1 1 1 0 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 6

  7. Standard Circuit Design A conventional CAM Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 7

  8. Conventional CAM Cell • M is a standard SRAM-Cell • D is the stored Data value • Search-Data is applied to SL • ML indicates match-state Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 8

  9. CAM Cell – search operation 1 • Assume: • D = 1 -> D = 0 Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 9

  10. CAM Cell – search operation 1 1. SL = 0 and SL = 0 -> M 1 and M 2 are switched off Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 10

  11. CAM Cell – search operation 2 1. SL = 0 and SL = 0 2. ML is precharged to V DD -> ML = 1 M 1 and M 2 are switched off -> No path ML to GND Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 11

  12. CAM Cell – search operation 3 (match) 1. SL = 0 and SL = 0 2. ML is precharged to V DD -> ML = 1 3. Assume SL = 1 -> SL = 0 M 2 and M 3 are switched off -> No path ML to GND ML stays at VDD -> ML = 1, match! Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 12

  13. CAM Cell – search operation 3 (mismatch) 1. SL = 0 and SL = 0 2. ML is precharged to V DD -> ML = 1 3. Assume SL = 0 -> SL = 1 M 2 and M 4 are switched on -> Path ML to GND ML discharges -> ML = 0, no match Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 13

  14. Array of Cells Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 14

  15. Power consumption • Searchlines: • Matchlines: • Long Lines with high capacitance: • Long Lines with high capacitance: • Wire capacitance • Wire capacitance • Gate capacitance of the match- • Diffusion capacitance of the pull-down Transistors Transistors • SL and SL are pulled to GND in every • Assumption: Miss in most cases cycle • ML is precharged and discharged in • Either SL or SL is charged to V DD every cycle Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 15

  16. Energy Efficient Design Reducing the power consumption Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 16

  17. 1. Pipelining the match line Pipelined Non-pipelined Stage 1 Stage 2 Stage 3 Stage 4 Stage 5 ML 0 ML 0 c c c c c c c c c c ML 1 ML 1 c c c c c c c c c c ML 2 ML 2 c c c c c c c c c c ML 3 ML 3 c c c c c c c c c c ML 4 ML 4 c c c c c c c c c c Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 17

  18. 1. Pipelining the match-line • Breaking up the long ML in stages Match-line-sense-amplifier Flip-flop • In case of match, the following enable ML stage is activated c c c c c x34 x34 x8 x34 x34 • In most cases, the ML is only partly precharged -> Reduced power consumption Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 18

  19. 2. Hierarchical search-lines Local-search-line (LSL) Global-search-line (GSL) • Global-search-lines • Not directly connected to CAM- ML 0 c c c c c cells ML 1 • To reduce capacitance c c c c c • Driven in every cycle ML 2 c c c c c • Local-search-lines ML 3 • Short, connected to a few CAM- c c c c c cells ML 4 • enabled, if match-line-segment is c c c c c activated Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 19

  20. 2. Hierarchical search-lines 2 • SL power consumption: 𝑄 𝑡𝑚 = 𝐷 𝑡𝑚 ∗ 𝑊 𝑡𝑚 • Usually: 𝑊 𝑡𝑚 = 𝑊 𝐸𝐸 • Lower voltage reduces power consumption • Lower Gate-Overdrive -> Decreased Speed • Solution: • Lower voltage V DDLow on global-search-lines • Amplifier to drive local-search-lines with V DD Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 20

  21. 3. ML-Precharge low • ML-Precharge high requires to precharge SL low • Contributes to SL power consumption • Precharge low: 1. Discharge all ML to GND 2. Apply Data to SL 3. Drive fixed current I ML to all ML 4. In match state there is no path to GND -> Voltage will rise Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 21

  22. 3. ML-Precharge low • Low Swing on match-line • Match-line-sense-amplifier triggered at V Th < V DD => No need to charge ML to V DD • No need to precharge SL low • No problem with path to GND in cells in mismatch state Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 22

  23. Simulation Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 23

  24. Simulation Setup • 1024 x 144 Bit Cam • 1x 8Bit, 4x 34Bit Segments • 180nm Cmos • 1,8V VDD • Typical Workload: • Populated with random data • 1 Match per search Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 24

  25. Schematic vs. Waveform Ref. 1 Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 25

  26. Simulation: Pipelined Matchlines • Assumption: • Most ML segments miss in the first 8 Bit • Expectation: • Power consumption reduced by 136/144 or 95% • Result: • 1,59/3,64 or 56% • Explanation: • Overhead of clocking the additional Ref. 1 ML-Flip-Flops and repeated circuitry Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 26

  27. Simulation: Total power consumption • Adding hierarchical searchlines: • 63% Reduction in SL power consumption • Total power consumption reduced by 60% Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 27

  28. Implementation A real-world Test chip Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 28

  29. Test Chip • VDD: 1,8V • Process: 180nm • Size: 2,3 x 2,1mm • Cycle Time: 7ns • 256 x 144 Bit CAM • 1x 8Bit, 4x 34Bit Segments • Only two segments use hierarchical SL • Allows Direct Comparison of power consumption Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 29

  30. Simulation vs. Implementation Ref. 1 Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 30

  31. Conclusion Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 31

  32. Conclusion • Presented Techniques to reduce power consumption: 1. Pipelined matchlines 2. Hierarchical searchlines 3. Precharge low scheme • Expected reduction of power consumption: ~60% • Slightly increased area needs: ~6% • Similar cycle times to conventional designs • Pipelined architecture introduces additional latency • Reduced Noise Immunity Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 32

  33. References • This Talk is based on: 1. K. Pagiamtzis, A. Sheikholeslami , “A low -power content-addressable memory (CAM) using pipelined hierarchical search- scheme”, IEEE Journal of solid-state Circuits, 2004 2. K. Pagiamtzis, A. Sheikholeslami , “Content - Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey”, IEEE Journal of solid-state Circuits, 2006 • Figures and graphics: 3. Android, incoming call, 2016 - http://i.stack.imgur.com/5eHW2.png Fabian Finkeldey, Energy Efficient Content-Addressable Memory 26.01.2016 33

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