Embedded Systems Engineering VO + LU Overview The module Embedded - - PowerPoint PPT Presentation

embedded systems engineering
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Embedded Systems Engineering VO + LU Overview The module Embedded - - PowerPoint PPT Presentation

Embedded Systems Engineering VO + LU Overview The module Embedded Systems Engineering is split in 2 parts: Lectures: ESE VO (182.721) ECTS: 3.0 Web: http://ti.tuwien.ac.at/rts/teaching/courses/esevo Staff: Prof. Radu Grosu,


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VO + LU

Embedded Systems Engineering

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SLIDE 2

Overview

The module Embedded Systems Engineering is split in 2 parts:

  • Lectures: ESE VO (182.721)

– ECTS: 3.0 – Web: http://ti.tuwien.ac.at/rts/teaching/courses/esevo – Staff: Prof. Radu Grosu, Dr. Ezio Bartocci, Dr. Christian El- Salloum, Dr. Armin Wasicek

  • Exercises: ESE LU (182.722)

– ECTS: 3.0 – Web: http://ti.tuwien.ac.at./rts/teaching/courses/eselu – Staff: Dr. Ezio Bartocci, Bernhard Frömel

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  • Design of Cyber-Physical Systems:

– Quality/Cognitive Complexity – Design of Distribute Systems – Software-Engineering – Real-time Modeling & Concurrency – Determinism & Fault tolerance – Models-of-Computation – Model-based Design – System Safety and Certification – Security

Embedded Systems Engineering VO

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Organization

  • Enrollment:

–Register for entrance exam (see website) 19/11/2012 - 12:00 –Final admission to both courses only if at least 60% of the score is achieved

  • Procedure:

–Preparation phase: self-study of the provided material –Written entrance exam: 22/11/2012 at 10:00 in HS8 –Classes (ESE VO):

  • 27/11/2012 – 24/01/2013, Tuesday and Thursday from 10:00 – 11:45
  • Seminarraum Techn. Informatik (Operngasse 9)

–Oral final exam (ESE VO):

  • The date will communicated at the end of the course

Embedded Systems Engineering VO

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Topics

  • Critical review of scientific work in the field of ESE
  • Practical introduction to development tools

– Control loop design of an application in the

automitive domain

– Decomposition to components of a distributed

realtime system

– Cluster schedule of a time-triggered communication

protocol

– Fault-tolerance concept – Detailed design and code generation – Safety case

Embedded Systems Engineering LU

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Organization

  • Enrollment: after entrance exam
  • Procedure:

– Course start: 03/12/2012 – 2-3 exercises in total (depending on toolchain

availability)

– First exercise individually, rest in groups – Group size will be announced after the entrance exam

  • TI lab account distribution during ESE VO class on

08/01/2013

Embedded Systems Engineering LU

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Grading

  • ESE VO:

– Entrance exam: 40% – Final exam: 60%

  • ESE LU:

– Exercise 1: 20% – Exercise 2+3: 80%

Embedded Systems Engineering

Result Grade [0.9, 1.0] 1 [0.8, 0.9) 2 [0.7, 0.8) 3 [0.6, 0.7) 4 [0.0, 0.6) 5