Efficient Persist Barriers for Multicores Arpit Joshi, Vijay - - PowerPoint PPT Presentation

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MICRO-48 Efficient Persist Barriers for Multicores Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, Stratis Viglas Summary Efficient persist barrier Used to implement persistency models Persistency = when stores become durable

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SLIDE 1

Efficient Persist Barriers for Multicores

Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, Stratis Viglas

MICRO-48

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December 9, 2015 MICRO-48

Summary

  • Efficient persist barrier
  • Used to implement persistency models
  • Persistency = when stores become durable

(Consistency = when stores become visible)

  • Evaluated
  • Buffered Epoch Persistency
  • Bulk Strict Persistency

2

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December 9, 2015 MICRO-48

Persistent Memory

Access Latency Access Granularity

3

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December 9, 2015 MICRO-48

Persistent Memory

Cache DRAM Secondary Storage

Access Latency Access Granularity

3

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December 9, 2015 MICRO-48

Persistent Memory

Cache DRAM Secondary Storage NVRAM

Access Latency Access Granularity

3

3D Xpoint STT-MRAM PCM

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December 9, 2015 MICRO-48

Persistent Memory

Cache DRAM Secondary Storage NVRAM

Access Latency Access Granularity Fast, fine grained persistence.

3

3D Xpoint STT-MRAM PCM

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December 9, 2015 MICRO-48

Persistent Memory

Advantages:

Unify memory and storage Access to persistent data through processor load/store interface

Challenge:

Maintaining consistency of data structures in memory

4

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December 9, 2015 MICRO-48

Consistency Challenge

Core Cache DRAM Secondary Storage

Software Controlled

5

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December 9, 2015 MICRO-48

Consistency Challenge

Core Cache NVRAM Secondary Storage

Hardware Controlled

Core Cache DRAM Secondary Storage

Software Controlled

5

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December 9, 2015 MICRO-48

Linked List - Naïve

Node Node 1

HEAD Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Update Head Pointer

Node Node 1

HEAD NVRAM

6

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December 9, 2015 MICRO-48

Linked List - Naïve

Node Node 1 Node 2

HEAD Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Update Head Pointer

Node Node 1

HEAD NVRAM

6

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December 9, 2015 MICRO-48

Linked List - Naïve

Node Node 1 Node 2

HEAD Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Update Head Pointer

Node Node 1 Node 2

HEAD NVRAM

6

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December 9, 2015 MICRO-48

Linked List - Naïve

Node Node 1 Node 2

HEAD Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Update Head Pointer

Node Node 1 Node 2

HEAD NVRAM

6

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December 9, 2015 MICRO-48

Linked List - Naïve

Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Update Head Pointer

Node Node 1 Node 2

HEAD NVRAM

6

System Crash!

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December 9, 2015 MICRO-48

Linked List - Failsafe

Node Node 1

HEAD Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Persist Barrier
  • 4. Update Head Pointer

Node Node 1

HEAD NVRAM

7

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December 9, 2015 MICRO-48

Linked List - Failsafe

Node Node 1 Node 2

HEAD Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Persist Barrier
  • 4. Update Head Pointer

Node Node 1

HEAD NVRAM

7

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December 9, 2015 MICRO-48

Linked List - Failsafe

Node Node 1 Node 2

HEAD Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Persist Barrier
  • 4. Update Head Pointer

Node Node 1 Node 2

HEAD NVRAM

7

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December 9, 2015 MICRO-48

Linked List - Failsafe

Node Node 1 Node 2

HEAD Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Persist Barrier
  • 4. Update Head Pointer

Node Node 1 Node 2

HEAD NVRAM

7

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December 9, 2015 MICRO-48

Linked List - Failsafe

Node Node 1 Node 2

HEAD Cache

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Persist Barrier
  • 4. Update Head Pointer

Node Node 1 Node 2

HEAD NVRAM

7

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December 9, 2015 MICRO-48

Linked List - Failsafe

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Persist Barrier
  • 4. Update Head Pointer

Epoch A Epoch B

8

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December 9, 2015 MICRO-48

Linked List - Failsafe

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Persist Barrier
  • 4. Update Head Pointer

Programmer Introduced

8

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December 9, 2015 MICRO-48

Linked List - Failsafe

Pseudo-code

  • 1. Create Node
  • 2. Update Node Pointer
  • 3. Persist Barrier
  • 4. Update Head Pointer

Programmer Introduced

Divide program execution into epochs through programmer inserted persist barriers = Epoch Persistence

8

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December 9, 2015 MICRO-48

St a St b St c St a Persist Barrier St d St e St d Persist Barrier St p St q St d …

Epoch Persistence*

* Pelley et. al., “Memory Persistency”, in ISCA-2014. 9

Epoch 3

b c a a a c d e

Epoch 2

d e p

Visibility Persistence

b

Epoch 1

d q d

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December 9, 2015 MICRO-48

St a St b St c St a Persist Barrier St d St e St d Persist Barrier St p St q St d …

Epoch Persistence*

* Pelley et. al., “Memory Persistency”, in ISCA-2014. 9

Epoch 3

b c a a a c d e

Epoch 2

d e p

Visibility Persistence

b

Epoch 1

d q d

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December 9, 2015 MICRO-48

St a St b St c St a Persist Barrier St d St e St d Persist Barrier St p St q St d …

Epoch Persistence*

* Pelley et. al., “Memory Persistency”, in ISCA-2014. 9

Epoch 3

b c a a a c d e

Epoch 2

d e p

Visibility Persistence

b

Epoch 1

d q d

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December 9, 2015 MICRO-48

St a St b St c St a Persist Barrier St d St e St d Persist Barrier St p St q St d …

Epoch Persistence*

* Pelley et. al., “Memory Persistency”, in ISCA-2014. 9

Epoch 3

b c a a a c d e

Epoch 2

d e p

Visibility Persistence

b

Epoch 1

d q d

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December 9, 2015 MICRO-48

St a St b St c St a Persist Barrier St d St e St d Persist Barrier St p St q St d …

Epoch Persistence*

* Pelley et. al., “Memory Persistency”, in ISCA-2014. 9

Epoch 3

b c a a a c d e

Epoch 2

d e p

Visibility Persistence

b

Epoch 1

d q d

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December 9, 2015 MICRO-48

St a St b St c St a Persist Barrier St d St e St d Persist Barrier St p St q St d …

Epoch Persistence*

* Pelley et. al., “Memory Persistency”, in ISCA-2014. 9

Epoch 3

b c a a a c d e

Epoch 2

d e p

Visibility Persistence

b

Epoch 1

d q d

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December 9, 2015 MICRO-48

St a St b St c St a Persist Barrier St d St e St d Persist Barrier St p St q St d …

Epoch Persistence*

* Pelley et. al., “Memory Persistency”, in ISCA-2014. 9

Epoch 3

b c a a a c d e

Epoch 2

d e p

Visibility Persistence

b

Epoch 1

d q d

Persist operations happen in the critical path of execution.

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December 9, 2015 MICRO-48

Buffered Epoch Persistence* through Lazy Barrier (LB)

  • Implementation of Epoch Persistence
  • Durability lags visibility
  • To allow performing persist operations out of critical path

10

* Pelley et. al., “Memory Persistency”, in ISCA-2014. * Condit et. al., “Better I/O through byte-addressable, persistent memory”, in SOSP-2009.

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December 9, 2015 MICRO-48

d − Conflicting request

a b c e d

Epoch 2

a b a c e

Persistence Visibility

Epoch 1

p q d

Epoch 3

d

Buffered Epoch Persistence* through Lazy Barrier (LB)

11

* Pelley et. al., “Memory Persistency”, in ISCA-2014. * Condit et. al., “Better I/O through byte-addressable, persistent memory”, in SOSP-2009.

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December 9, 2015 MICRO-48

d − Conflicting request

a b c e d

Epoch 2

a b a c e

Persistence Visibility

Epoch 1

p q d

Epoch 3

d

Buffered Epoch Persistence* through Lazy Barrier (LB)

11

* Pelley et. al., “Memory Persistency”, in ISCA-2014. * Condit et. al., “Better I/O through byte-addressable, persistent memory”, in SOSP-2009.

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December 9, 2015 MICRO-48

d − Conflicting request

a b c e d

Epoch 2

a b a c e

Persistence Visibility

Epoch 1

p q d

Epoch 3

d

Buffered Epoch Persistence* through Lazy Barrier (LB)

11

* Pelley et. al., “Memory Persistency”, in ISCA-2014. * Condit et. al., “Better I/O through byte-addressable, persistent memory”, in SOSP-2009.

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December 9, 2015 MICRO-48

d − Conflicting request

a b c e d

Epoch 2

a b a c e

Persistence Visibility

Epoch 1

p q d

Epoch 3

d

Buffered Epoch Persistence* through Lazy Barrier (LB)

11

Cache Line Eviction

* Pelley et. al., “Memory Persistency”, in ISCA-2014. * Condit et. al., “Better I/O through byte-addressable, persistent memory”, in SOSP-2009.

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December 9, 2015 MICRO-48

d − Conflicting request

a b c e d

Epoch 2

a b a c e

Persistence Visibility

Epoch 1

p q d

Epoch 3

d

Buffered Epoch Persistence* through Lazy Barrier (LB)

11

* Pelley et. al., “Memory Persistency”, in ISCA-2014. * Condit et. al., “Better I/O through byte-addressable, persistent memory”, in SOSP-2009.

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December 9, 2015 MICRO-48

d − Conflicting request

a b c e d

Epoch 2

a b a c e

Persistence Visibility

Epoch 1

p q d

Epoch 3

d

Buffered Epoch Persistence* through Lazy Barrier (LB)

11

* Pelley et. al., “Memory Persistency”, in ISCA-2014. * Condit et. al., “Better I/O through byte-addressable, persistent memory”, in SOSP-2009.

Conflicts bring persist operations back in the critical path.

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December 9, 2015 MICRO-48

Intra-thread Conflict

12

d − Conflicting request

a b c e d

Epoch 2

a b a c e

Persistence Visibility

Epoch 1

p q d

Epoch 3

d

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December 9, 2015 MICRO-48

Intra-thread Conflict

12

d − Conflicting request

a b c e d

Epoch 2

a b a c e

Persistence Visibility

Epoch 1

p q d

Epoch 3

d

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December 9, 2015 MICRO-48

Proactive Flush (PF)

  • Persist Triggers in Lazy Barrier
  • Passive Trigger: cache line eviction
  • Reactive Trigger: flush on (intra/inter)-thread conflicts

13

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December 9, 2015 MICRO-48

Proactive Flush (PF)

  • Persist Triggers in Lazy Barrier
  • Passive Trigger: cache line eviction
  • Reactive Trigger: flush on (intra/inter)-thread conflicts
  • Persist Trigger with Proactive Flush
  • Proactive Trigger: proactively flush on epoch completion

13

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December 9, 2015 MICRO-48

e a b c e d

Epoch 2

a b d

Persistence Visibility

Epoch 1 Epoch 3

a c p q d

d

Proactive Flush (PF)

14

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December 9, 2015 MICRO-48

e a b c e d

Epoch 2

a b d

Persistence Visibility

Epoch 1 Epoch 3

a c p q d

d

Proactive Flush (PF)

14

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December 9, 2015 MICRO-48

e a b c e d

Epoch 2

a b d

Persistence Visibility

Epoch 1 Epoch 3

a c p q d

d

Proactive Flush (PF)

14

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December 9, 2015 MICRO-48

e a b c e d

Epoch 2

a b d

Persistence Visibility

Epoch 1 Epoch 3

a c p q d

d

Proactive Flush (PF)

14

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December 9, 2015 MICRO-48

e a b c e d

Epoch 2

a b d

Persistence Visibility

Epoch 1 Epoch 3

a c p q d

d

Proactive Flush (PF)

14

Proactive Flush

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December 9, 2015 MICRO-48

e a b c e d

Epoch 2

a b d

Persistence Visibility

Epoch 1 Epoch 3

a c p q d

d

Proactive Flush (PF)

14

Proactive Flush

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December 9, 2015 MICRO-48

e a b c e d

Epoch 2

a b d

Persistence Visibility

Epoch 1 Epoch 3

a c p q d

d

Proactive Flush (PF)

14

Proactive Flush Reduces the probability of encountering conflicts.

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December 9, 2015 MICRO-48

Thread

Epoch Epoch Epoch

Persistence Visibility Visibility

RY RX W

Z

W

B

W

E

W

F

E B A F

W

A

RP W

E

RQ

E Z

T0 Thread T1

RB

00

E10 E11 E

Inter-thread Conflict

15

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December 9, 2015 MICRO-48

Thread

Epoch Epoch Epoch

Persistence Visibility Visibility

RY RX W

Z

W

B

W

E

W

F

E B A F

W

A

RP W

E

RQ

E Z

T0 Thread T1

RB

00

E10 E11 E

Inter-thread Conflict

15

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December 9, 2015 MICRO-48

Thread

Epoch Epoch Epoch

Persistence Visibility Visibility

RY RX W

Z

W

B

W

E

W

F

E B A F

W

A

RP W

E

RQ

E Z

T0 Thread T1

RB

00

E10 E11 E

Inter-thread Conflict

15

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December 9, 2015 MICRO-48

Thread

Epoch Epoch Epoch

Persistence Visibility Visibility

RY RX W

Z

W

B

W

E

W

F

E B A F

W

A

RP W

E

RQ

E Z

T0 Thread T1

RB

00

E10 E11 E

Inter-thread Conflict

15

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December 9, 2015 MICRO-48

Thread

Epoch Epoch Epoch

Persistence Visibility Visibility

RY RX W

Z

W

B

W

E

W

F

E B A F

W

A

RP W

E

RQ

E Z

T0 Thread T1

RB

00

E10 E11 E

Inter-thread Conflict

15

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December 9, 2015 MICRO-48

Inter-thread Dependency Tracking (IDT)

  • Lazy barrier
  • No tracking of inter-thread dependencies
  • Need to enforce dependencies online

16

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December 9, 2015 MICRO-48

Inter-thread Dependency Tracking (IDT)

  • Lazy barrier
  • No tracking of inter-thread dependencies
  • Need to enforce dependencies online
  • Inter-thread Dependency Tracking
  • Add inter-thread dependence tracking registers
  • Track dependencies to enforce offline

16

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December 9, 2015 MICRO-48

Visibility

Epoch Epoch

Persistence Visibility Thread

RY RX W

Z

W

B

W

E

W

F

E B F

W

A

RP

Z

T1

RQ W

E

T0 Thread

A E

RB

Epoch

00

E10

11

E E

Inter-thread Dependency Tracking (IDT)

17

IDT Table

Source Dependent

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December 9, 2015 MICRO-48

Visibility

Epoch Epoch

Persistence Visibility Thread

RY RX W

Z

W

B

W

E

W

F

E B F

W

A

RP

Z

T1

RQ W

E

T0 Thread

A E

RB

Epoch

00

E10

11

E E

Inter-thread Dependency Tracking (IDT)

17

IDT Table

Source Dependent

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December 9, 2015 MICRO-48

Visibility

Epoch Epoch

Persistence Visibility Thread

RY RX W

Z

W

B

W

E

W

F

E B F

W

A

RP

Z

T1

RQ W

E

T0 Thread

A E

RB

Epoch

00

E10

11

E E

Inter-thread Dependency Tracking (IDT)

17

IDT Table

Source Dependent

IDT Table

Source Dependent

Epoch E00 Epoch E11

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December 9, 2015 MICRO-48

Visibility

Epoch Epoch

Persistence Visibility Thread

RY RX W

Z

W

B

W

E

W

F

E B F

W

A

RP

Z

T1

RQ W

E

T0 Thread

A E

RB

Epoch

00

E10

11

E E

Inter-thread Dependency Tracking (IDT)

17

IDT Table

Source Dependent

IDT Table

Source Dependent

Epoch E00 Epoch E11

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December 9, 2015 MICRO-48

Visibility

Epoch Epoch

Persistence Visibility Thread

RY RX W

Z

W

B

W

E

W

F

E B F

W

A

RP

Z

T1

RQ W

E

T0 Thread

A E

RB

Epoch

00

E10

11

E E

Inter-thread Dependency Tracking (IDT)

17

IDT Table

Source Dependent

IDT Table

Source Dependent

Epoch E00 Epoch E11

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December 9, 2015 MICRO-48

Visibility

Epoch Epoch

Persistence Visibility Thread

RY RX W

Z

W

B

W

E

W

F

E B F

W

A

RP

Z

T1

RQ W

E

T0 Thread

A E

RB

Epoch

00

E10

11

E E

Inter-thread Dependency Tracking (IDT)

17

IDT Table

Source Dependent

Reduces the latency of conflicting requests.

IDT Table

Source Dependent

Epoch E00 Epoch E11

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December 9, 2015 MICRO-48

Evaluation

  • Persistency Models
  • Buffered Epoch Persistency (BEP)
  • maintaining in-memory persistent data structures
  • Bulk Strict Persistency (BSP) = BEP + atomicity
  • provide stronger persistency model (strict persistency) — similar to

doing sequential consistency in bulk mode*

LB Lazy barrier LB+IDT Lazy barrier with inter-thread dependence tracking (IDT) LB+PF Lazy barrier with proactive flush (PF) LB++ Lazy barrier with both IDT and PF

Persist Barrier Designs

18 * Ceze et. al., “BulkSC: Bulk enforcement of sequential consistency”, in ISCA-2007.

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December 9, 2015 MICRO-48

System Configuration

  • We evaluate proposed design using GEM5 full-system

simulation mode

  • 32 Core CMP with 32x1MB LLC cache banks and 4 memory

controllers

  • More details on implementation of persist barrier for such a system are

in the paper.

19

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December 9, 2015 MICRO-48

BEP Transaction Throughput

20

Higher is Better

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December 9, 2015 MICRO-48

BEP Transaction Throughput

20

Higher is Better 3%

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December 9, 2015 MICRO-48

BEP Transaction Throughput

20

Higher is Better 15%

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December 9, 2015 MICRO-48

BEP Transaction Throughput

20

Higher is Better 22%

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December 9, 2015 MICRO-48

BSP Execution Time

21

Lower is Better

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December 9, 2015 MICRO-48

BSP Execution Time

21

15% Lower is Better

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December 9, 2015 MICRO-48

BSP Execution Time

21

20% Lower is Better

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December 9, 2015 MICRO-48

Conclusion

  • We propose an efficient implementation of a persist barrier primitive
  • Buffered implementation, to move persists out of critical path
  • We highlight how conflicts bring them back into critical path
  • We propose and implement two optimizations
  • Proactive Flush: Reduce the percentage of conflicting epochs
  • Inter-thread Dependence Tracking: Reduce the penalty of inter-thread

conflicts

  • We demonstrate the efficacy by implementing two persistence

models, namely BEP and BSP efficiently

22

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SLIDE 71

Efficient Persist Barriers for Multicores

Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, Stratis Viglas

MICRO-48