Dominant Resource Fairness in Cloud Computing Systems with Heterogeneous Servers
Wei Wang, Baochun Li, Ben Liang Department of Electrical and Computer Engineering University of Toronto April 30, 2014
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Dominant Resource Fairness in Cloud Computing Systems with Heterogeneous Servers Wei Wang , Baochun Li, Ben Liang Department of Electrical and Computer Engineering University of Toronto April 30, 2014 Introduction Cloud computing system
Wei Wang, Baochun Li, Ben Liang Department of Electrical and Computer Engineering University of Toronto April 30, 2014
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Number of servers CPUs Memory 6732 0.50 0.50 3863 0.50 0.25 1001 0.50 0.75 795 1.00 1.00 126 0.25 0.25 52 0.50 0.12 5 0.50 0.03 5 0.50 0.97 3 1.00 0.50 1 0.50 0.06
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Memory CPUs Server 1 Server 2 (1 CPU, 14 GB) (8 CPUs, 4 GB)
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Memory CPUs Server 1 Server 2 (1 CPU, 14 GB) (8 CPUs, 4 GB)
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
Memory CPUs Server 1 Server 2 (1 CPU, 14 GB) (8 CPUs, 4 GB)
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
Memory CPUs Server 1 Server 2 (1 CPU, 14 GB) (8 CPUs, 4 GB)
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Memory CPUs Server 1 Server 2 (1 CPU, 14 GB) (8 CPUs, 4 GB)
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
max
A
min
i∈U Gi(Ai)
s.t. X
i∈U
Ailr ≤ clr, ∀l ∈ S, r ∈ R .
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
X
l2S
Ailr = 1/n, 8r 2 R, i 2 U .
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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X
l2S
Ailr = 1/n, 8r 2 R, i 2 U .
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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200 400 600 800 1000 1200 1400 0.2 0.4 0.6 0.8 1 Time (min) CPU Utilization Best−Fit DRFH First−Fit DRFH Slots 200 400 600 800 1000 1200 1400 0.2 0.4 0.6 0.8 1 Time (min) Memory Utilization Best−Fit DRFH First−Fit DRFH Slots
Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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Wei Wang, Department of Electrical and Computer Engineering, University of Toronto
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