Directives and Control Flow 2 Directives Pseudo-instructions - - PowerPoint PPT Presentation

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EE 109 Unit 10 – Assembler Directives and Control Flow

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ASSEMBLERS

Directives Pseudo-instructions

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Writing Assembly

• Code written at the assembly level needs

some additional help for specifying certain things

– Global variables – Where code and data should be placed in memory – Easy ways to reference memory locations

• To help us do this assemblers provide some

additional statements that we can use

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Our Simulator - MARS

Download at: http://courses.missouristate.edu/KenVollmar/MARS/

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Assembler Syntax

• In MARS and most assemblers each line of the

assembly program may be one of three possible options

– Comment – Instruction / Pseudo-instruction – Assembler Directive

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Comments

• In MARS an entire line can be marked as a comment

by starting it with a pound (#) character:

• Example:

# This line will be ignored by the assembler LW $2,8($3) ADDI $2,$2,1 ...

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Instructions

• In MARS each instruction is written on a

separate line and has the following syntax:

(Label:)

• Instruc. Op.

Operands Comment

• Example:

START: ADD $2,$3,$4 # R[2]=R[3] + R[4]

• Notes:

– Label is optional and is a text identifier for the address where the instruction is placed in memory. (These are normally used to identify the target of a branch

• r jump instruction.)

– In MARS, a comment can be inserted after an instruction by using a ‘#’ sign – A label can be on a line by itself in which case it refers to the address of the first instruction listed after it

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Labels and Instructions

• The optional label in front of an instruction

evaluates to the address where the instruction

• r data starts in memory and can be used in
• ther instructions

.text START: LW $4,8($10) L1: ADDI $4,$4,-1 BNE $4,$0,L1 J START LW ADDI BNE J 0x400000 = START 0x400004 = L1 0x400008 0x40000C Assembly Source File …and replaces the labels with their corresponding address Assembler finds what address each instruction starts at… Note: The BNE instruc. causes the program to branch (jump) to the instruction at the specified address if the two operands are Not Equal. The J(ump) instruction causes program execution to jump to the specified label (address). .text LW $4,8($10) ADDI $4,$4,-1 BNE $4,$0,0x400004 J 0x400000

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Assembler Directives

• Similar to pre-processor statements (#include,

#define, etc.) and global variable declarations in C/C++

– Text and data segments – Reserving & initializing global variables and constants – Compiler and linker status

• Direct the assembler in how to assemble the actual

instructions and how to initialize memory when the program is loaded

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An Example

• This is output from an

actual MIPS gcc/g++ compiler

• Actual instructions are at

the bottom (addiu, srl, etc.)

• Directives are the things

starting with .

• Labels are names ending

with :

• Let's learn about some of

the directives

x: .word 5 .globl nums .section .bss .align 2 .type nums, @object .size nums, 40 nums: .space 40 .text .align 2 .globl _Z6calleei $LFB2: .ent _Z6calleei _Z6calleei: .frame $sp,0,$31 .mask 0x00000000,0 .fmask 0x00000000,0 addiu $2,$4,3 srl $3,$2,31 addu $2,$2,$3

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Text and Static Data Segments

• .text directive indicates the

following instructions should be placed in the program area of memory

• .data directive indicates the

following data declarations will be placed in the data memory segment

Unused 0x0040_0000 Text Segment Static Data Segment Dynamic Data Segment Stack I/O Space 0x1000_0000 0x8000_0000 0xFFFF_FFFC 0x1000_8000 0x7FFF_FFFC 0x0000_0000

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Static Data Directives

• Fills memory with specified data when program is

loaded

• Format:

(Label:) .type_id val_0,val_1,…,val_n

• type_id = {.byte, .half, .word, .float, .double}
• Each value in the comma separated list will be

stored using the indicated size

– Example: myval: .word 1, 2, 0x0003

• Each value 1, 2, 3 is stored as a word (i.e. 32-bits)
• Label “myval” evaluates to the start address of the first

word (i.e. of the value 1)

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More Static Data Directives

• Can be used to initialize ASCII strings
• Format:

(Label:) .ascii “string” (Label:) .asciiz “string”

• .asciiz adds a null-termination character (0) at

the end of the string while .ascii does not

– Example: string: .asciiz “Hello world\n”

• Each character stored as a byte (including \n = Line Feed and

\0 = Null (0) character)

• Label “myval” evaluates to the start address of the first byte of

the string

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Reserving Memory

• Reserves space in memory but leaves the contents

unchanged

• Format:

(Label:) .space num_bytes

.data dat1: .word 0x12345678 array: .space 4 dat2: .word 0xFEDCBA98 00 00 00 00 FE DC BA 98 0x1000000C 00 00 00 00 0x10000008 = dat2 0x10000004 = array 12 34 56 78 0x10000000 = dat1 Skipped

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Alignment Directive

• Used to skip to the next, correctly-aligned address

for the given data size

• Format:
• 0 = byte-, 1 = half-, 2 = word-, 3 = double-alignment

.align 0,1,2, or 3

.data dat1: .byte 1, 2, 3 .align 1 dat2: .half 0x4567 .align 2 dat3: .word 0x89ABCDEF 00 00 00 00 89 AB CD EF 0x1000000C 00 00 45 67 0x10000008 = dat3 0x10000004 = dat2 00 03 02 01 0x10000000 = dat1 Skipped Skipped Note: The number after .align is not how many bytes to skip, it indicates what type of data will come next and thus the size to be aligned

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.data example Examples

• C1 evaluates to 0x10001000
• MSG evaluates to 0x10001002 (Note: \n = Line Feed char. = 0x0A)
• DAT evaluates to 0x10001006
• VAR evaluates to 0x1000100C

.data C1: .byte 0xFE,0x05 MSG: .asciiz “SC\n” DAT: .half 1,2 .align 2 VAR: .word 0x12345678 00 01 00 0A 0x10010000 Skipped because a word must begin on a 4-byte boundary 43 53 05 FE 00 00 00 02 12 34 56 78 0x10010004 0x10010008 0x1001000C

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C/C++ and Directives

• Directives are used to initialize or reserve

space for global variables in C

short int count = 7; char message[16]; int table[8] = {0,1,2,3,4,5,6,7}; void main() { ... } .data count: .half 7 message: .space 16 .align 2 table: .word 0,1,2,3,4,5,6,7 .text .globl main main: ...

C/C++ style global declarations Assembly equivalent

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Summary & Notes

• Assembler Directives:

– Tell the assembler how to build the program memory image

• Where instructions and data should be placed in memory when

the program is loaded

• How to initialize certain global variables
• Recall, a compiler/assembler simply outputs a

memory IMAGE of the program. It must then be loaded into memory by the OS to be executed.

• Key: Directives are NOT instructions!

– They are used by the assembler to create the memory image and then removed – The MIPS processor never sees these directives!

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Directives in the Software Flow

1110 0010 0101 1001 0110 1011 0000 1100 0100 1101 0111 1111 1010 1100 0010 1011 0001 0110 0011 1000 MOVE.W X,D0 CMPI.W #0,D0 BLE SKIP ADD Y,D0 SUB Z,D0 SKIP MUL …

High Level Language Description Assembly (.asm/.s files) Executable Binary Image int n = 0xC259; void main(){ if (x > 0) x = x + y - z; a = b*x;

.data n: .word 0xC259 .text SLT $4,$2,$0 BNE SKIP … SKIP: MUL … 1110 0010 0101 1001 0110 1011 0000 1100 0100 1101 0111 1111 1010 1100 0010 1011 0001 0110 0011 1000

.c/.cpp files

1110 0010 0101 1001 0110 1011 0000 1100 0100 1101 0111 1111 1010 1100 0010 1011 0001 0110 0011 1000

Object/Machine Code (.o files) Compiler Assembler Linker Loader / OS Program Executing Assembler Directives are used to create the

• bject code (executable)

image… …the processor NEVER sees/executes these directives PC SLT BNE

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Assembly Process

• The assembly procedure of a file requires two

passes over the code

– 1st Pass: Build a symbol table

• Maps labels to corresponding addresses

– 2nd Pass: Substitute corresponding values for labels and symbols and then translate to machine code

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Assembly Process Diagram

.data count: .word -1 .text Main: la $2,count

Assembler (MARS)

.s Assembly Input File

Symbol Table count = 0x10010000 MAIN = 0x400000

.data count: .word -1 .text Main: la $2,0x10010000

1st Pass 2nd Pass

@0x10010000:0xFFFFFFFF @0x400000:0x3c021001 “Executable” File

Host System (PC) Target System (MIPS)

3C 02 10 01 0x00400000

MIPS Proc.

Data Structure (Part of Assembler Program)

400000 PC FF FF FF FF 0x10010000 …

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Pseudo-instructions

• “Macros” translated by the assembler to

instructions actually supported by the HW

• Simplifies writing code in assembly
• Example – LI (Load-immediate) pseudo-

instruction translated by assembler to 2 instruction sequence (LUI & ORI)

... lui $2, 0x1234

• ri $2, $2, 0x5678

... ... li $2, 0x12345678 ...

With pseudo-instruction After assembler…

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Pseudo-instructions

Pseudo-instruction Actual Assembly NOT Rd,Rs NOR Rd,Rs,$0 NEG Rd,Rs SUB Rd,$0,Rs LI Rt, immed. # Load Immediate LUI Rt, {immediate[31:16], 16’b0} ORI Rt, {16’b0, immediate[15:0]} LA Rt, label # Load Address LUI Rt, {immediate[31:16], 16’b0} ORI Rt, {16’b0, immediate[15:0]} BLT Rs,Rt,Label SLT $1,Rs,Rt BNE $1,$0,Label

Note: Pseudoinstructions are assembler-dependent. See MARS Help for more details.

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Support for Pseudo-instructions

• Pseudo-instructions often expand to several

instructions and there is a need for usage of a temporary register

• Assembler reserves register $1

– In the assembler, $1 = $at (assembler temp.)

• You can use $1 but it will be overwritten when

you use certain pseudo-instructions

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CONTROL FLOW

Branch Instructions Loops and Conditionals

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Branch Instructions

• Branches allow us to jump backward or forward in
• ur code
• How? By manipulating the Program Counter (PC)
• Operation: PC = PC + displacement

label ----

• branch
• branch
• label ----

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Branch Instructions

• Conditional Branches

– Branches only if a particular condition is true – Fundamental Instrucs.: BEQ (if equal), BNE (not equal) – Syntax: BNE/BEQ Rs, Rt, label

• Compares Rs, Rt and if EQ/NE, branch to label, else continue
• Unconditional Branches

– Always branches to a new location in the code – Instruction: BEQ $0,$0,label – Pseudo-instruction: B label

label: ----

• b label
• beq $2,$3,label
• label: ----

!= =

Some Examples

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Two-Operand Compare & Branches

• Two-operand comparison is accomplished using the

SLT/SLTI/SLTU (Set If Less-than) instruction followed by a BNE/BEQ

– Syntax: SLT Rd,Rs,Rt or SLT Rd,Rs,imm

• If Rs < Rt then Rd = 1, else Rd = 0

– Use appropriate BNE/BEQ instruction to infer relationship

Branch if… SLT BNE/BEQ $2 < $3 SLT $1,$2,$3 BNE $1,$0,label $2 ≤ $3 SLT $1,$3,$2 BEQ $1,$0,label $2 > $3 SLT $1,$3,$2 BNE $1,$0,label $2 ≥ $3 SLT $1,$2,$3 BEQ $1,$0,label

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Branch Pseudo-Instructions

Note: Pseudoinstructions are assembler-dependent. See MARS Help for more details.

• Rather than writing two instructions (SLT and BNE/BEQ) we

can use provided pseudoinstructions

Pseudo-instruction Description BLT Rt, Rs, label Branch if less-than BLE Rt, Rs, label Branch if less-than or equal BGT Rt, Rs, label Branch if greater-than BGE Rt, Rs, label Branch if greater-than of equal BLTU Rt, Rs, label Branch if less-than (unsigned) BLT Rt, imm, label Branch if less-than immediate

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Comparison with SLT

• Performing comparison with the SLT instruction is

really accomplished by subtracting A-B and examining the sign of the result

– if A-B = 0, then A=B – if A-B = negative #, then A<B – If A-B = positive # and not 0, then A>B

• Determining if the result is positive or negative

requires

– knowing what system is being used

• signed or unsigned?

– if overflow occurred

• when overflow occurs the sign of the result is incorrect (i.e. p+p =

n or n+n = p)

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SLT/SLTU Operation

• Use appropriate version based on system being

used

– SLT for signed operand – SLTU for unsigned operands

• An SLT instruction subtracts A-B and examine

sign of the result and the overflow test to determine if it should set the result

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Single-Operand Compare & Branches

• BGT, BLT, BGE, BLE are pseudoinstructions

– Shorthand for an SLT and BEQ

• MIPS does have some single instructions to

compare and branch all in one, but only for a single operand compared with 0

• Syntax: BccZ Rt, label

– cc = {LT, LE, GT, GE}

Branch Instruc. Branch if… BLTZ $2,label $2 < 0 BLEZ $2,label $2 ≤ 0 BGTZ $2,label $2 > 0 BGEZ $2,label $2 ≥ 0

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TRANSLATING LOOPS & CONDITIONALS

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Branch Example 1

if A > B (&A in $t0) A = A + B (&B in $t1) else A = 1 .text LW $t2,0($t0) LW $t3,0($t1) SLT $1,$t3,$t2 BEQ $1,$0,ELSE ADD $t2,$t2,$t3 B NEXT ELSE: ADDI $t2,$0,1 NEXT: SW $t2,0($t0)

• C Code

MIPS Assembly Could use pseudo-inst. “BLE $4,$5,ELSE” This branch skips over the “else” portion. This is a pseudo-instruction and is translated to BEQ $0,$0,next

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Branch Example 2

for(i=0;i < 10;i++) ($t0=i) j = j + i; ($t1=j) .text ADD $t0,$0,$0 LOOP: SLTI $1,$t0,10 BEQ $1,$0,NEXT ADD $t1,$t1,$t0 ADDI $t0,$t0,1 B LOOP NEXT: ---- C Code MIPS Assembly Branches if i is not less than 10 Loops back to the comparison check

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Another Branch Example

int dat[10]; for(i=0;i < 10;i++) data[i] = 5; .data dat: .space 40 .text la $t0,dat addi $t1,$zero,10 addi $t2,$zero,5 LOOP: sw $t2,0($t0) addi $t0,$t0,4 addi $t1,$t1,-1 bne $t1,$zero,LOOP NEXT: ----

C Code MIPS Assembly

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A Final Example

char A[] = “hello world”; char B[50]; // strcpy(B,A); i=0; while(A[i] != 0){ B[i] = A[i]; i++; } B[i] = 0;

.data A: .asciiz “hello world” B: .space 50 .text la $t0,A la $t1,B LOOP: lb $t2,0($t0) beq $t2,$zero,NEXT sb $t2,0($t1) addi $t0,$t0,1 addi $t1,$t1,1 b LOOP NEXT: sb $t2,0($t1)

C Code MIPS Assembly

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A Final Example

char A[] = “hello world”; char B[50]; // strcpy(B,A); while(A[i] != 0){ B[i] = A[i]; i++; } B[i] = 0; .data A: .asciiz “hello world” B: .space 50 .text la $t0,A la $t1,B LOOP: lb $t2,0($t0) beq $t2,$zero,NEXT sb $t2,0($t1) addi $t0,$t0,1 addi $t1,$t1,1 b LOOP NEXT: sb $t2,0($t1)

h A e l … d 00 B … 0x100 0x200

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DEEPER LOOK AT HOW BRANCHES WORK

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Branch Machine Code Format

• Branch instructions use the I-Type Format
• Operation: PC = PC + {disp.,00}
• Displacement notes

– Displacement is the value that should be added to the PC so that it now points to the desired branch location – Processor appends two 0’s to end of disp. since all instructions are 4-byte words

• Essentially, displacement is in units of words
• Effective range of displacement is an 18-bit signed value = ±128KB

address space (i.e. can’t branch anywhere in memory…but long branches are rare and there is a mechanism to handle them)

• pcode

rs (src1) 6-bits 5-bits rt (src2) 5-bits Signed displacement 16-bits

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Branch Displacement

• To calculate displacement you must know where instructions

are stored in memory (relative to each other)

– Don’t worry, assembler finds displacement for you…you just use the label

MIPS Assembly

SLTI ADD ADDI ADDI BEQ ADD BEQ

• A

1 word for each instruction

.text ADD $8,$0,$0 ADDI $7,$0,10 LOOP: SLTI $1,$8,10 BEQ $1,$0,NEXT ADD $9,$9,$8 ADDI $8,$8,1 BEQ $0,$0,LOOP NEXT: ----

A + 0x4 A + 0x8 A + 0xC A + 0x10 A + 0x14 A + 0x18 A + 0x1C

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Calculating Displacements

• Disp. = [(Addr. of Target) – (Addr. of Branch + 4)] / 4

– Constant 4 is due to the fact that by the time the branch executes the PC will be pointing at the instruction after it (i.e. plus 4 bytes)

• Following slides will show displacement calculation for BEQ

$1,$0,NEXT

MIPS Assembly

SLTI ADD ADDI ADDI BEQ ADD BEQ

• A

1 word for each instruction

.text ADD $8,$0,$0 ADDI $7,$0,10 LOOP: SLTI $1,$8,10 BEQ $1,$0,NEXT ADD $9,$9,$8 ADDI $8,$8,1 BEQ $0,$0,LOOP NEXT: ----

A + 0x4 A + 0x8 A + 0xC A + 0x10 A + 0x14 A + 0x18 A + 0x1C

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Calculating Displacements

• Disp. = [(Addr. of Target) – (Addr. of Branch + 4)] / 4
• Disp. = (A+0x1C) – (A+0x0C+ 4) = 0x1C – 0x10 = 0x0C / 4

= 0x03

MIPS Assembly

SLTI ADD ADDI ADDI BEQ ADD BEQ

• A

1 word for each instruction

.text ADD $8,$0,$0 ADDI $7,$0,10 LOOP: SLTI $1,$8,10 BEQ $1,$0,NEXT ADD $9,$9,$8 ADDI $8,$8,1 BEQ $0,$0,LOOP NEXT: ----

A + 0x4 A + 0x8 A + 0xC A + 0x10 A + 0x14 A + 0x18 A + 0x1C

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Calculating Displacements

• If the BEQ does in fact branch, it will add the displacement

({0x03, 00} = 0x000C) to the PC (A+0x10) and thus point to the instruction at the NEXT label (A+0x1C)

A + 0x10 + 000C A + 0x1C PC PC (after fetching BEQ) (after adding displacement)

MIPS Assembly .text ADD $8,$0,$0 ADDI $7,$0,10 LOOP: SLTI $1,$8,10 BEQ $1,$0,NEXT ADD $9,$9,$8 ADDI $8,$8,1 BEQ $0,$0,LOOP NEXT: ----

SLTI ADD ADDI ADDI BEQ ADD BEQ

• A

A + 0x4 A + 0x8 A + 0xC A + 0x10 A + 0x14 A + 0x18 A + 0x1C 000100 00001

• pcode

rs 00000 rt 0000 0000 0000 0011 immediate

BEQ $1,$0,0x03

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Another Example

• Disp. = [(Addr. of Label) – (Addr. of Branch + 4)] / 4
• Disp. = (A+0x04) – (A+0x14 + 4) = 0x04 – 0x18

= 0xFFEC / 4 = 0xFFFB

.text ADD $8,$0,$0 LOOP: SLTI $1,$8,10 BEQ $1,$0,NEXT ADD $9,$9,$8 ADDI $8,$8,1 BEQ $0,$0,LOOP NEXT: ----

SLTI ADD ADDI BEQ ADD BEQ

• A

A + 0x4 A + 0x8 A + 0xC A + 0x10 A + 0x14 A + 0x18 000100 00000

• pcode

rs 00000 rt 1111 1111 1111 1011 immediate

BEQ $0,$0,0xFFFB

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Jump Instructions

• Jumps provide method of

branching beyond range of 16-bit displacement

• Syntax: J label/address

– Operation: PC = address – Address is appended with two 0’s just like branch displacement yielding a 28- bit address with upper 4-bits

• f PC unaffected
• New instruction format:

J-Type

• pcode

6-bits Jump address 26-bits Old PC 00 Jump address

Old PC [31:28]

PC before execution of Jump New PC after execution of Jump Sample Jump instruction 4-bits 26-bits 2-bits

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Jump Example

• Take 28 LSB’s of target address, remove LSB’s

(which are 0’s) and store 26-bits in the jump instruction

.text ADD $8,$0,$0 SLTI $1,$8,10 BEQ $1,$0,SKIP J L1 SKIP: ADDI $8,$8,1 ... L1: SUB SLTI ADD J BEQ BEQ ADDI

• 0xE0400000

0xE0400004 0xE0400008 0xE040000C 0xE0400010 0xE0400014 SUB 0xEC800004 0000 10

• pcode

11 0010 0000 0000 0000 0000 0001 Target Address / 4 0xC8000004 / 4 E0400010 PC before exec. of jump: EC800004 PC after exec. of jump:

1110 1100 1000 0000 0000 0000 0000 01 00

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Jump Register

• ‘jr’ instruction can be used if a full 32-bit jump

is needed or variable jump address is needed

• Syntax: JR rs

– Operation: PC = R[s] – R-Type machine code format

• Usage:

– Can load rs with an immediate address – Can calculate rs for a variable jump (class member functions, switch statements, etc.)

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jr Example

• Take whatever value is in the source register

and places it in the PC (jumping you to that address)

.text ADD $8,$0,$0 LUI $6,0xffff ORI $6,$6,0x0010 JR $6 ... 0xffff0010: SUB 00400010 PC before exec. of jr: FFFF0010 PC after exec. of jr: FFFF0010 Value of $6

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BACKUP / OLD

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Linker Directives

• .globl

label

– Allows the following label and data to be referenced from other compilation units (files)

• .extern label size

– Defines an externally allocated (in another file) static data storage with size at address label

.data .extern dat1 4 .text .globl main main: la $1,dat1 ... .data dat1: .word 0x12345678 dat1 is defined in another file. Main is visible to other files file1.s file2.s

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SLT/SLTU Operation

• Use appropriate version based on sign

– SLT for signed operand – SLTU for unsigned operands

• An SLT instruction subtracts A-B and examine

sign of the result and the overflow test to determine if it should set the result

• Tests to determine less-than (negative) condition

– < Signed: (Neg. & No OV) OR (Pos. & OV) – < Unsigned: (Unsigned OV)

• For unsigned subtraction, overflow is defined when the result is

negative (i.e. Cout = 0)…thus we use that test