dDOSI Spectrum Analysis Unit Critical Design Review Team dDOSI - - PowerPoint PPT Presentation

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dDOSI Spectrum Analysis Unit Critical Design Review Team dDOSI - - PowerPoint PPT Presentation

dDOSI Spectrum Analysis Unit Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit Critical Design Review Team dDOSI (#19) Caroline Ekchian, Benjamin Havey, Andy Mo, Thomas Nadovich, & Chris Woodall Client: Darren Roblyer dDOSI


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dDOSI Spectrum Analysis Unit

Critical Design Review

Team dDOSI (#19) Caroline Ekchian, Benjamin Havey, Andy Mo, Thomas Nadovich, & Chris Woodall Client: Darren Roblyer

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

The Background

  • Digital Diffuse Optical Spectroscopy (dDOS) is a medical imaging modality that measures the

diffusion of light through skin.

  • Non-Invasive method
  • Applications in breast cancer diagnosis and treatment monitoring.
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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit Amplitude Reduced Phase Delayed Tissue Diffusion Modeling and Analysis

Frequency Domain Diffuse Optical Spectroscopy (DOS)

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit Amplitude Reduced Phase Delayed Tissue Diffusion Modeling and Analysis

Frequency Domain Diffuse Optical Spectroscopy (DOS)

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Goal

Provide a measurement system to our customer which provides a direct-to- digital approach to DOS.

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Full System Overview

Patient

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Full System Overview

Our Project Patient

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

  • Create reference signals from 50MHz-500MHz to drive up to 6 laser

diodes.

  • Record the reference and detected signal, after diffusing through a sample.
  • Present the results in a GUI and provide a Dynamic-Link Library (DLL) to

communicate with the spectrum analysis unit.

Deliverables

  • Software: DLL and GUI written in Visual C++ for Windows
  • Hardware: 1 Motherboard (ADC, microZed, etc) and 6 Frequency

Synthesis Boards.

  • Firmware: Interface FPGA blocks to ADC, and DDS, Linux Distribution
  • Communications: Server/Client to move data from the motherboard to the

host computer

Requirements

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

System Block Diagram

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Hardware Design

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Hardware Block Diagram

The Motherboard DDS Board x6

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Motherboard Top Level Diagram

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

  • Single Ended to Differential (Unbalance

to Balance)

  • 700MHz Cutoff
  • Proper 50 Ohms Termination

Motherboard Progress - Analog Front End

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

  • 250 MHz Clock oscillator with 100Ohm

LVDS outputs.

  • Alternate single-ended CMOS 3.3V

clock.

  • Clock Multiplexer allows for proper

termination and reduction of stubs.

Motherboard Progress - 250MHz Clock with Clock Mux

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

  • CMOS 25MHz

Oscillator.

  • External 50 Ohms

SMA oscillator (for different DDS frequencies).

  • Clock Multiplexer for

selection.

  • 1 to 6 Clock Fanout

chip to drive clocks for all 6 DDS from same source.

Motherboard Progress - 25 MHz Clock w/Clock Buffer

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

  • PCB Layout

○ Major focus on laying out the motherboard PCB. ○ Impedance controlled routing and length matched differential routing.

  • Specifying Interfaces To Microzed
  • Designing appropriate tests to prove individual part functionality.

○ Must verify all subsystems work as expected before moving to integrating with Microzed

Motherboard To-Do

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Power Subsystem Block Diagram

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

1: 5v-3.3v Switching

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Power Subsystem Schematic Designed

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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DDS & Mechanical To-Do

  • The DDS schematic is close to completion and the layout

must be implemented.

  • Heat dissipation and cooling must be verified as sufficient
  • The mechanical mounting of the boards must be finalized &

an enclosure must be procured.

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Firmware Design

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Firmware Block Diagram

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Firmware Design

  • The microZed is a development board for the Zynq-7000 SoC,

which includes an Artix-7 FPGA and an ARM dual Core A9

  • processor. The board also has 1GB of external DDR RAM.
  • The FPGA portion of the microZed will send the control signals to

the DDS and the ADC as well as collect data from the ADC. If time permits there will also be a GPIO module.

  • The ARM portion of the microZed will deal with communications to

a host computer (over ethernet) and will collect data from the FPGA

  • ver the AMBA bus.
  • The ARM portion will be running Zynq Linux, a Linux distribution

developed by Xilinx for this SoC.

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Firmware Progress

  • The system has been designed and all parts have been confirmed

to meet our needs

  • The uBoot bootloader, a special bootloader used for embedded

SoC systems, has been made for our specific build

  • The Zynq Linux rootfs has been modified for our needs.
  • A Linux/FPGA interconnect system has been implemented to allow

for communication between the ARM and the Artix.

  • A baseline communication protocol has been designed and

successfully tested. This allows control commands and data collection to occur between the microZed and a host computer running our GUI on Windows.

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Data Collection Model

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Firmware To-Do

  • The communications and data collection currently occurs serially.

This needs to be done in parallel, taking advantage of both cores

  • n the ARM, to allow for fast (gigabit) transfers.
  • Custom HDL code needs to be integrated into the firmware block

design in the form of custom IPs (opposed to pre-made). This way new modules can easily be appended to our design in future implementations.

  • The ADC/DDS controls need to be written, simulated, and tested

then added as custom IPs to the block design.

  • More complex communications messages must be added/parsed

for remote sweep control.

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Software

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Client

GUI

Client Function RT Grapher Data File Data from Server Post Processing

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Data [n:0] MSG Type [31:0] “w”, “s”, ”r” Address [31:0] Data [n:0] MSG Type [31:0] “b”, “f”, “e” Client request packets Server response packets

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Current Server Response State

Send success Idle: Waiting for instructions Write data to addr location Socket Parser Begin Scan and start collecting data to send over “W” type received “S” type received

Request Received

Request is bad Send “e” type error message to client Send “b/f” type message to notify client of completion Error writing to location

Send success Send success

Write Complete

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Protocol:ToDo

  • Complete Client-Gui integration
  • Complete Zedboard-Server integration
  • Optimize server for data streaming
  • Make DLLs of client server code
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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

GUI Progress

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

GUI Progress

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

GUI: What Needs to be Done?

  • Improve file naming convention
  • Complete Graphs/Post Processing Tab
  • Graph phase and amplitude information
  • Include GUI functionality in a Dynamically Linked Library

(DLL)

  • Improve control functionality for Laser Diodes
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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Gantt Charts & Group Progress

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Chris Woodall Revised GANTT Chart

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Thomas Nadovich Gantt Chart

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

Questions?

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Hardware - Motherboard Overview

  • Xilinx Zynq Z-7010[5] System on Chip with Dual Core ARM Cortex-A9 (PS)

at 866MHz and Artix-7 FPGA section (PL) ○ 1Gbps Ethernet RJ-45 ○ USB to Serial Converter ○ JTAG Connector ○ Uses Avent microZed[4] and FCI Connectors to reduce layout time. ■ Some power regulation done on board (1.8V and 3.3V)

■ Connectors part numbers Mouser #649-61082-101400LF, and #649-61083-101400LF.

  • ADS62P49[3] 250MSPS Dual Channel 14-bit ADC
  • 50Ω Single Ended Inputs and Outputs (SMA Connectors)
  • Connector to 6 Channel DDS Board
  • DC Barrel Jack to 12V 10A Laptop supply (Alternatives being inspected)
  • Indicator LEDs (Error states, and some configuration info).
  • GPIO and SPI breakout connector, for future add-ons.

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Hardware - Motherboard ADC Selection

  • Sampling Frequency: 250MSPS
  • Resolution: 14 bits
  • ENOB: 11.3 bits
  • SNR: 73 dB
  • INLmax: ±5 LSB
  • DNLmax: ±1.3 LSB
  • Input Range: 2Vp-p
  • Utilizing an undersampling method[6] to

sample across a bandwidth from 50MHz to 500MHz.

  • Phase and Amplitude error is minimal if

frequencies in sweep are selected carefully.

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

ADS62P49 Block Diagram[3]

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Hardware - Motherboard ADC Selection Continued

  • 7 1.8V CMOS Control Lines
  • 1 LVDS pairs for each clock

○ Input and Output

  • 14 LVDS Pairs for Data

○ 7 pairs per channel ○ posedge(clk) = EVEN ○ negedge(clk) = ODD

  • Requires 1.8 V and 3.3 V
  • Power at 250 MSPS 1.25 W

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Hardware - A Defense of Undersampling

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Hardware - A Defense of Undersampling

  • Undersampling has been inspected by Justin Jung6 (Researcher in Darren’

s Lab) and shown to have minimum phase and amplitude error. ○ Furthering the state of the art in terms of cost.

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

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Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit

FPGA Block Design

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References

[1]: Uedoa, Shigeto, Darren Roblyer, et al. “Baseline Tumor Oxygen Saturation Correlates with a Pathologic Complete Response in Breast Cancer Patients Undergoing Neoadjuvant Chemotherapy”. Cancer Research. July 8, 2012. [2]: Texas Instruments. “ADS62P49 Datasheet”. January 2011. http://www.ti.com/lit/ds/symlink/ads62p49.pdf [3]: Analog Devices. “AD9910 Datasheet”. May 2012. http://www.analog.com/static/imported-files/data_sheets/AD9914.pdf [4]: Avnet. “Zedboard Hardware User Guide”. November 2013. http://www.zedboard.org/sites/default/files/documentations/MicroZed_HW_UG_v1_2.pdf [5]: Xilinx. “XC7Z010 Datasheet”. http://www.xilinx.com/support/documentation/data_sheets/ds187-XC7Z010-XC7Z020-Data-Sheet.pdf

[6]: Justin Jung, and Darren Roblyer. “Feasibility of Undersampling”. Email. November 2013. [7]: Bud Industries. “Prospective enclosure Datasheet”. August 2007. http://www.budind.com/pdf/hb4521.pdf [8]: Roblyer, Darren, et al. “Feasibility of direct digital sampling for diffuse optical frequency domain spectroscopy in tissue”. Meas. Sci. Technol. 24. 2013.

Team #19 Customer: Darren Roblyer dDOSI Spectrum Analysis Unit