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Dark Silicon Dark Silicon and its Implications for Future Processor Design Max Menges 22. December 2015 1 / 21 Dark Silicon Introduction: What is dark silicon? Motivation 10 25 3500 3000 8 20 Frequency [GHz] Utilization [%] 2500


  1. Dark Silicon Dark Silicon and its Implications for Future Processor Design Max Menges 22. December 2015 1 / 21

  2. Dark Silicon Introduction: What is dark silicon? Motivation 10 25 3500 3000 8 20 Frequency [GHz] Utilization [%] 2500 Power [W] 6 15 2000 1500 4 10 1000 2 5 500 0 0 0 90nm TSMC 45nm TSMC 32nm ITRS 90nm TSMC 45nm TSMC 32nm ITRS 90nm TSMC 45nm TSMC 32nm ITRS 2 / 21

  3. Dark Silicon Introduction: What is dark silicon? What is dark silicon? The utilization wall refers to the part of a chip which can actively be used within the power budget at full frequency. This is dropping exponentially with each process generation. The unused silicon that is left unpowered is referred to as dark silicon . 3 / 21

  4. Dark Silicon Introduction: What is dark silicon? 1 Introduction: What is dark silicon? 2 Background: Where does dark silicon come from? 3 Conservation Cores: Utilizing dark silicon. 4 / 21

  5. Dark Silicon Background: Where does dark silicon come from? What is in a CPU? Sudha Yalamanchili, Architectural Alternatives for Energy Efficient Performance Scaling , VLSI Conference, 2013 5 / 21

  6. Dark Silicon Background: Where does dark silicon come from? Power Consumption D-cache 6% Dynamic power when switching I-cache P dyn = α C L V 2 f 23% Data path Subthreshold leakage 38% Fetch/ VGS − Vth decode P leak ∝ e nVT 19% Gate-oxide leakage due to Register file 14% quantum meachanical tunneling Baseline CPU 91 pJ/instr. Goulding-Hotta et al. The GreenDroid Mobile Application Processor: An Architecture for Silicon’s Dark Future , Micro IEEE, vol.31, no.2, 2011 6 / 21

  7. Dark Silicon Background: Where does dark silicon come from? Technology Scaling Scale geometries by factor S = 1 . 4, e.g. from 90 nm to 65 nm Ideally scale all voltages etc. accordingly Devices per chip at constant area A increases by S 2 ≈ 2 No increase in power due to constant energy density P S = 1 S C · 1 S 2 V 2 · Sf = 1 S 2 P Classical Param. Description Rel. Scaling W , L Transistor dimensions 1 / S V dd , V th Supply & threshold voltages 1 / S t ox Oxide thicknes 1 / S C Gate capacitance WL / t ox 1 / S CV 2 f 1 / S 2 p Power per device P Full die, full power Dp 1 U Utilization B / P 1 7 / 21

  8. Dark Silicon Background: Where does dark silicon come from? Dennard Scaling Gate Source Drain Gate-leakage Subthreshold Dennard’s Law: The power density in a transistor stays constant as geometries shrink Breakdown of Dennard scaling due to leakage current at about 2005-2007, around the 65nm process Limited by subthreshold leakage current and QM tunneling effects at thin gate oxide 8 / 21

  9. Dark Silicon Background: Where does dark silicon come from? Technology Scaling II Post Dennard scaling is leakage limited, V dd and V th cannot be lowered Continue to scale geometries by factor S = 1 . 4 Utilization will decrease with a factor of 1 / S 2 with each new process generation Classical Leakage Param. Description Rel. Scaling Limited W , L Transistor dimensions 1 / S 1 / S V dd , V th Supply & threshold voltages 1 / S 1 t ox Oxide thicknes 1 / S 1 / S C Gate capacitance WL / t ox 1 / S 1 / S CV 2 f 1 / S 2 Power per device p 1 1 / S 2 P Full die, full power Dp 1 1 / S 2 U Utilization B / P 1 9 / 21

  10. Dark Silicon Background: Where does dark silicon come from? Muticore CPUs Single core CPUs derive speedup from Single core frequency gains Core 0 Core 1 Manycore little BIG ? 10 / 21

  11. Dark Silicon Background: Where does dark silicon come from? Muticore CPUs Single core CPUs derive speedup from Single core frequency gains Transition to multicore CPUs Core 0 Core 1 Reduce clock frequency to 80% Power: P M = 0 . 512 · P S Gain 1 . 6x performance by adding a second core Manycore little BIG ? 10 / 21

  12. Dark Silicon Background: Where does dark silicon come from? Muticore CPUs Single core CPUs derive speedup from Single core frequency gains Transition to multicore CPUs Core 0 Core 1 Reduce clock frequency to 80% Power: P M = 0 . 512 · P S Gain 1 . 6x performance by adding a second core Low frequency, throughput orientated Manycore manycores for regular floating point arithmetics little BIG ? 10 / 21

  13. Dark Silicon Background: Where does dark silicon come from? Muticore CPUs Single core CPUs derive speedup from Single core frequency gains Transition to multicore CPUs Core 0 Core 1 Reduce clock frequency to 80% Power: P M = 0 . 512 · P S Gain 1 . 6x performance by adding a second core Low frequency, throughput orientated Manycore manycores for regular floating point arithmetics Heterogeneous cores for energy little BIG efficient computations ? 10 / 21

  14. Dark Silicon Background: Where does dark silicon come from? Muticore CPUs Single core CPUs derive speedup from Single core frequency gains Transition to multicore CPUs Core 0 Core 1 Reduce clock frequency to 80% Power: P M = 0 . 512 · P S Gain 1 . 6x performance by adding a second core Low frequency, throughput orientated Manycore manycores for regular floating point arithmetics Heterogeneous cores for energy little BIG efficient computations Specialized hardware ? 10 / 21

  15. Dark Silicon Background: Where does dark silicon come from? 1 Introduction: What is dark silicon? 2 Background: Where does dark silicon come from? 3 Conservation Cores: Utilizing dark silicon. 11 / 21

  16. Dark Silicon Conservation Cores: Utilizing dark silicon. The GreenDroid The GreenDroid is a proposed energy efficient chip design targeted at Andriod mobile phones Power limitation of 3 W Android OS ideal as a limited software platform User applications run in a VM Common applications: Web browser, e-mail, media player Short replacement cycle Utilize dark silicon in energy efficient conservation cores 12 / 21

  17. Dark Silicon Conservation Cores: Utilizing dark silicon. What is a C-Core? Specialized core which implements software functions in hardware Analyze most frequently used functions and translate to verilog code C-cores are coupled to a host CPU via L1 cache and scan chain 13 / 21

  18. Dark Silicon Conservation Cores: Utilizing dark silicon. Tile layout Chip layout Tile layout Venkatesh et al. Conservation Cores: Reducing the Energy of Mature Computations , SIGARCH Comput. Archit. News, March 2010 14 / 21

  19. Dark Silicon Conservation Cores: Utilizing dark silicon. Generating the Cores I Characterize workload and identify regions of hot i = 0 code computeArraySum sum = 0 { sum = 0; Translate CFG to state for(i = 0; i < n; i++) phi(i) F { phi(sum) machine i < n sum += a[i]; } Compile code return(sum); } Compare c-core specs sum+=a[i] return(sum) i++ and code Venkatesh et al. Conservation Cores: Reducing the Generate stubs that Energy of Mature Computations , SIGARCH Comput. Archit. News, March 2010 allow execution on c-core or CPU 15 / 21

  20. Dark Silicon Conservation Cores: Utilizing dark silicon. Generating the Cores II Change code to Scan Chain Control Data Path 0 0 Interface allow patching Path muxSel sInit muxSel Constants Scan Chain sum a i n cond==0 s1 sRet Operators + cond 1 + < Control flow s2 addr value ldEn + ld unit en valid ldValid Insert scan chains ldValid==0 s3 Cache and synthesise to Interface hardware Venkatesh et al. Conservation Cores: Reducing the Energy of Mature Computations , SIGARCH Comput. Archit. News, March 2010 Add exception bit to each state transition 16 / 21

  21. Dark Silicon Conservation Cores: Utilizing dark silicon. Execution Decide at runtime to execute code on CPU or c-core Pass function arguments via scan chain Start c-core execution with a single bit master scan chain Once complete the c-core throws an exception and transfers controll back to the CPU In case of a patched core, pass control back and forth between CPU and c-core 17 / 21

  22. Dark Silicon Conservation Cores: Utilizing dark silicon. Results I Reduce energy by removing instruction fetch and decode and simplifying the data path C-core executions in one example tile span ≈ 10% of code Goulding-Hotta et al. The GreenDroid Mobile Application Processor: An Architecture for Silicon’s Dark Future , Micro IEEE, vol.31, no.2, 2011 18 / 21

  23. Dark Silicon Conservation Cores: Utilizing dark silicon. Results II Normalized application execution time 1.8 1.4 Normalized application energy 1.6 1.2 1.00 1.4 1 . 1 Conservation Core 1.2 1.00 1.01 Leakage 0.8 0.67 Core Leakage 1 Exception D − Cache Leakage 0.8 0.6 Argument Transfer Core Clock 0.6 Dispatch Overhead Conservation Core 0.4 Initialization Dynamic 0.4 Conservation Core Core Dynamic 0.2 0.2 MIPS D − Cache Dynamic 0 0 C-Core C-Core MIPS MIPS Venkatesh et al. Conservation Cores: Reducing the Energy of Mature Computations , SIGARCH Comput. Archit. News, March 2010 Average energy and execution times of bzip2, cjpeg, djpeg, mcf and vpr in c-cores and the MIPS core. 19 / 21

  24. Dark Silicon Conservation Cores: Utilizing dark silicon. Conclusion Dark silicon is the part of chip which cannot be operated within the power budget 20 / 21

  25. Dark Silicon Conservation Cores: Utilizing dark silicon. Conclusion Dark silicon is the part of chip which cannot be operated within the power budget It is a result of scaling process technologies without reducing supply voltage accordingly 20 / 21

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