DAPHNE STATUS Javier F. Castao, Deywis Moreno Universidad Antonio - - PowerPoint PPT Presentation

DAPHNE STATUS

Javier F. Castaño, Deywis Moreno Universidad Antonio Nariño-Colombia Manuel Arroyave Escuela de Ingenieria de Antioquia-Colombia Juan Vega CONIDA-Peru Sten Hansen, Miguel Marchan Fermilab Photosensor Workshop December 12th, 2019

12/12/2019

Photosensor Workshop

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Content

• DAPHNE status and features
• DAPHNE-Cold Electronics connection
• Current work

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DAPHNE

• 40 channels/65

Msps/14 bits

• Bias-Trim Voltage

supply

• Cold Electronics

power supply + 3V

• Gigabit link up to 6.6

Gb/s to FELIX DAQ/full-mode protocol

• DUNE Timing

interface

Photosensor Workshop

12/12/2019

DAPHNE-COLD ELECTRONICS (AFE)

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HDMI flat connector (19 pins), 2 for each AFE/ADC, 10 in total Transformer H1164NLT (8 channels) AFE5808A 8 Inputs

From circuit controlling VbiasRaw (from Power Supply), 1 for each AFE (2 connectors) 1 Trim Voltage (0 to 4,096 V) for each channel (DAC-controlled)

Photosensor Workshop

12/12/2019

DAPHNE-COLD ELECTRONICS(ADC)

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HDMI flat connector 19 pins, 2 for each AFE/ADC, 10 in total 2-stage filter ADC LTM9808-14 8 inputs

Photosensor Workshop

12/12/2019

COLD ELECTRONICS CONNECTION

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CURRENT WORK

• Reviewing Schematic (2 weeks)
• Starting layout implementation: next week
• Firmware/software development in parallel
• Software: microcontroller STM32 (Juan Vega-CONIDA, Peru –

Javier Castaño)

• Firmware: Artix-7 Vivado, Migen-Litex core (Leaded by Manuel

Arroyave-EIA, Javier Castaño-UAN, Colombia)

• Full-mode 4.8 Gb/s link (Leaded by Jorge Molina, Esteban

Cristaldo, Paraguay)

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THANKS!

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DAPHNE SCHEDULE

Photosensor Workshop

12/12/2019

DAPHNE-SSP

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