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Correct-by-Design Control Synthesis for Multilevel Converters using State Space Decomposition G. Feld 2 L. Fribourg 1 D. Labrousse 2 B. Revol 2 R. Soulat 1 1 LSV, 2 SATIE - ENS Cachan & CNRS FSFMA, 13 May 2014 G. Feld 2 , L. Fribourg 1 , D.

  1. Context: Multilevel Converters Principle of Multilevel Converters made of capacitors and pairs of (complementary) switching cells G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 7 / 34

  2. Context: Multilevel Converters Principle of Multilevel Converters made of capacitors and pairs of (complementary) switching cells two source of input voltages G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 7 / 34

  3. Context: Multilevel Converters Principle of Multilevel Converters made of capacitors and pairs of (complementary) switching cells two source of input voltages according to the positions of the cells (mode), one is able to fraction the load voltage G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 7 / 34

  4. Context: Multilevel Converters Principle of Multilevel Converters made of capacitors and pairs of (complementary) switching cells two source of input voltages according to the positions of the cells (mode), one is able to fraction the load voltage switching of modes occur periodically (sampling time τ ) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 7 / 34

  5. Context: Multilevel Converters Principle of Multilevel Converters made of capacitors and pairs of (complementary) switching cells two source of input voltages according to the positions of the cells (mode), one is able to fraction the load voltage switching of modes occur periodically (sampling time τ ) � transform a DC voltage into a staircase waveform ( ≈ sinusoidal) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 7 / 34

  6. Context: Multilevel Converters Focus According to the position of S i and S i +1 , the capacitor C i contributes or not to the output voltage. G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 8 / 34

  7. Context: Multilevel Converters Focus According to the position of S i and S i +1 , the capacitor C i contributes or not to the output voltage. By global positioning of the switching cells, one is thus able to fraction the output voltage between − v i and + v i . G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 8 / 34

  8. Context: Multilevel Converters Example: 5-level converter By controlling the modes at each sampling time, one can synthesize a 5-level staircase function G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 9 / 34

  9. Context: Multilevel Converters Example: 5-level converter By controlling the modes at each sampling time, one can synthesize a 5-level staircase function G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 9 / 34

  10. Context: Multilevel Converters Example: 5-level converter By controlling the modes at each sampling time, one can synthesize a 5-level staircase function G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 9 / 34

  11. Context: Multilevel Converters Example: 5-level converter By controlling the modes at each sampling time, one can synthesize a 5-level staircase function G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 9 / 34

  12. Context: Multilevel Converters Example: 5-level converter By controlling the modes at each sampling time, one can synthesize a 5-level staircase function G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 9 / 34

  13. Context: Multilevel Converters Example: 5-level converter By controlling the modes at each sampling time, one can synthesize a 5-level staircase function G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 9 / 34

  14. Context: Multilevel Converters Example: 5-level converter By controlling the modes at each sampling time, one can synthesize a 5-level staircase function G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 9 / 34

  15. Context: Multilevel Converters Example : 5-level multilevel converter A priori, many switching sequences exist: paths of a graph where nodes correspond to modes ( S 1 S 2 S 3 S 4 ) with S i = 0 , 1, and adjacent nodes differ by one bit G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 10 / 34

  16. Context: Multilevel Converters Example : 5-level multilevel converter A priori, many switching sequences exist: paths of a graph where nodes correspond to modes ( S 1 S 2 S 3 S 4 ) with S i = 0 , 1, and adjacent nodes differ by one bit G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 10 / 34

  17. Context: Multilevel Converters Example : 5-level multilevel converter A priori, many switching sequences exist: paths of a graph where nodes correspond to modes ( S 1 S 2 S 3 S 4 ) with S i = 0 , 1, and adjacent nodes differ by one bit for 1 cycle: 576 patterns (sequence of 8 modes) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 10 / 34

  18. Context: Multilevel Converters Example : 5-level multilevel converter A priori, many switching sequences exist: paths of a graph where nodes correspond to modes ( S 1 S 2 S 3 S 4 ) with S i = 0 , 1, and adjacent nodes differ by one bit for 1 cycle: 576 patterns (sequence of 8 modes) for n cycles: (576) n paths G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 10 / 34

  19. Context: Multilevel Converters Capacitor Voltage Balance Requirement G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 11 / 34

  20. Context: Multilevel Converters Capacitor Voltage Balance Requirement Actually, a control path is admissible only if the capacitor voltages fluctuate minimally between two switchings: capacitor voltage balancing property G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 11 / 34

  21. Context: Multilevel Converters Capacitor Voltage Balance Requirement Actually, a control path is admissible only if the capacitor voltages fluctuate minimally between two switchings: capacitor voltage balancing property Difficult in practice: after a few cycles, most control paths make the capacitor voltages ց 0 or the switches reach a blocking voltage value ( � collapse of the system) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 11 / 34

  22. Context: Multilevel Converters Capacitor Voltage Balance Requirement Actually, a control path is admissible only if the capacitor voltages fluctuate minimally between two switchings: capacitor voltage balancing property Difficult in practice: after a few cycles, most control paths make the capacitor voltages ց 0 or the switches reach a blocking voltage value ( � collapse of the system) The control problem is to find at each sampling time the appropriate sequence of switching modes which maintains the capacitor voltage balancing G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 11 / 34

  23. Context: Multilevel Converters Capacitor Voltage Balance Requirement Actually, a control path is admissible only if the capacitor voltages fluctuate minimally between two switchings: capacitor voltage balancing property Difficult in practice: after a few cycles, most control paths make the capacitor voltages ց 0 or the switches reach a blocking voltage value ( � collapse of the system) The control problem is to find at each sampling time the appropriate sequence of switching modes which maintains the capacitor voltage balancing In industry, use of heuristic rules in order to find predefined sequences of patterns and apply them repeatedly (no formal guarantee of capacitor voltage balance property) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 11 / 34

  24. Context: Multilevel Converters Our Approach We see: G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 12 / 34

  25. Context: Multilevel Converters Our Approach We see: the multilevel converter as a sampled switching system G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 12 / 34

  26. Context: Multilevel Converters Our Approach We see: the multilevel converter as a sampled switching system the control as state-dependent (depending on the electrical state of the system) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 12 / 34

  27. Context: Multilevel Converters Our Approach We see: the multilevel converter as a sampled switching system the control as state-dependent (depending on the electrical state of the system) the capacitor voltage balancing as a safety property G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 12 / 34

  28. Context: Multilevel Converters Our Approach We see: the multilevel converter as a sampled switching system the control as state-dependent (depending on the electrical state of the system) the capacitor voltage balancing as a safety property The problem is to synthesize a safety controller for the switching system (correct-by-design controller) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 12 / 34

  29. Controllability of Switched Systems Controllability of Switched Systems G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 13 / 34

  30. Controllability of Switched Systems What is a Sampled Switched System Formally G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 14 / 34

  31. Controllability of Switched Systems What is a Sampled Switched System Formally A state variable x G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 14 / 34

  32. Controllability of Switched Systems What is a Sampled Switched System Formally A state variable x A set of p modes U = { 1 , 2 , · · · , p } G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 14 / 34

  33. Controllability of Switched Systems What is a Sampled Switched System Formally A state variable x A set of p modes U = { 1 , 2 , · · · , p } Each mode u ∈ U is associated to a dynamic ˙ x = A u ( x ) + b u for some matrix A u and vector b u G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 14 / 34

  34. Controllability of Switched Systems What is a Sampled Switched System Formally A state variable x A set of p modes U = { 1 , 2 , · · · , p } Each mode u ∈ U is associated to a dynamic ˙ x = A u ( x ) + b u for some matrix A u and vector b u Sampled switching modes at t = τ, 2 τ, · · · G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 14 / 34

  35. Controllability of Switched Systems What is a Sampled Switched System Formally A state variable x A set of p modes U = { 1 , 2 , · · · , p } Each mode u ∈ U is associated to a dynamic ˙ x = A u ( x ) + b u for some matrix A u and vector b u Sampled switching modes at t = τ, 2 τ, · · · If x ( τ, x, u ) denotes the “successor” point reached by the system at time τ under mode u from initial condition x , then Post u ( X ) = { x ′ | x ( τ, x, u ) = x ′ for some x ∈ X } G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 14 / 34

  36. Controllability of Switched Systems What is a Sampled Switched System Formally A state variable x A set of p modes U = { 1 , 2 , · · · , p } Each mode u ∈ U is associated to a dynamic ˙ x = A u ( x ) + b u for some matrix A u and vector b u Sampled switching modes at t = τ, 2 τ, · · · If x ( τ, x, u ) denotes the “successor” point reached by the system at time τ under mode u from initial condition x , then Post u ( X ) = { x ′ | x ( τ, x, u ) = x ′ for some x ∈ X } Pre u ( X ) = { x | x ( τ, x, u ) = x ′ for some x ′ ∈ X } G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 14 / 34

  37. Controllability of Switched Systems Multilevel Converter as a Switched system The mode corresponds to the position of the switching cells S = ( S 1 , S 2 , S 3 , S 4 ) with S i ∈ { 0 , 1 } G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 15 / 34

  38. Controllability of Switched Systems Multilevel Converter as a Switched system The mode corresponds to the position of the switching cells S = ( S 1 , S 2 , S 3 , S 4 ) with S i ∈ { 0 , 1 } x = [ v 1 , v 2 , v 3 , i ] ⊤ with v i voltage across C i and i current of circuit G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 15 / 34

  39. Controllability of Switched Systems Multilevel Converter as a Switched system The mode corresponds to the position of the switching cells S = ( S 1 , S 2 , S 3 , S 4 ) with S i ∈ { 0 , 1 } x = [ v 1 , v 2 , v 3 , i ] ⊤ with v i voltage across C i and i current of circuit duration of cycle T = 8 τ G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 15 / 34

  40. Controllability of Switched Systems Multilevel Converter as a Switched system The mode corresponds to the position of the switching cells S = ( S 1 , S 2 , S 3 , S 4 ) with S i ∈ { 0 , 1 } x = [ v 1 , v 2 , v 3 , i ] ⊤ with v i voltage across C i and i current of circuit duration of cycle T = 8 τ The 5-level converter can be seen as a switched system. Given a mode S , the associated dynamics is of the form ˙ x ( t ) = A S x ( t ) + b S with: 1  S 1 − S 2    − 0 0 0 R 1 C 1 C 1 1 S 2 − S 3 0 − 0 0     R 2 C 2 C 2 A S =  b S =     1 S 3 − S 4 0 0 0 −     R 3 C 3 C 3    (2 S 1 − 1) v input S 2 − S 1 S 3 − S 2 S 4 − S 3 − R Load L Load L Load L Load L Load L Load G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 15 / 34

  41. Controllability of Switched Systems Safety Control Problem At every τ , find the appropriate mode p (or pattern π ) according to the current value of x , in order to always stay in a predefined safety zone R , corresponding here to capacitor voltage balancing (small fluctuation of the capacitor voltages) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 16 / 34

  42. Controllability of Switched Systems Safety Control Problem At every τ , find the appropriate mode p (or pattern π ) according to the current value of x , in order to always stay in a predefined safety zone R , corresponding here to capacitor voltage balancing (small fluctuation of the capacitor voltages) For a 5-level converter with a waveform of amplitude of 200 V , centered around 0 V , the ideal capacitor voltages are: v ∗ 1 = 150 V, v ∗ 2 = 100 V, v ∗ 3 = 50 V G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 16 / 34

  43. Controllability of Switched Systems Safety Control Problem At every τ , find the appropriate mode p (or pattern π ) according to the current value of x , in order to always stay in a predefined safety zone R , corresponding here to capacitor voltage balancing (small fluctuation of the capacitor voltages) For a 5-level converter with a waveform of amplitude of 200 V , centered around 0 V , the ideal capacitor voltages are: v ∗ 1 = 150 V, v ∗ 2 = 100 V, v ∗ 3 = 50 V If a fluctuation of ± 5 V is admissible, the safety area is: R = [145 , 155] × [95 , 105] × [45 , 55] G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 16 / 34

  44. State Decomposition State Decomposition G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 17 / 34

  45. State Decomposition Classical Safety Control Synthesis (Ramadge-Wonham) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 18 / 34

  46. State Decomposition Classical Safety Control Synthesis (Ramadge-Wonham) Given a safety area R G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 18 / 34

  47. State Decomposition Classical Safety Control Synthesis (Ramadge-Wonham) Given a safety area R Problem: Find all the points of R that can be controlled to always stay within R (controllable subset) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 18 / 34

  48. State Decomposition Classical Safety Control Synthesis (Ramadge-Wonham) Given a safety area R Problem: Find all the points of R that can be controlled to always stay within R (controllable subset) Alternatively: Find the maximal invariant subset M of R (i.e., largest M ⊆ R such that Post ( M ) ⊆ M ) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 18 / 34

  49. State Decomposition Classical Safety Control Synthesis (Ramadge-Wonham) Given a safety area R Problem: Find all the points of R that can be controlled to always stay within R (controllable subset) Alternatively: Find the maximal invariant subset M of R (i.e., largest M ⊆ R such that Post ( M ) ⊆ M ) k ≥ 0 ( Pre k ( R ))) Backward procedure ( � G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 18 / 34

  50. State Decomposition Classical Safety Control Synthesis (Ramadge-Wonham) Given a safety area R Problem: Find all the points of R that can be controlled to always stay within R (controllable subset) Alternatively: Find the maximal invariant subset M of R (i.e., largest M ⊆ R such that Post ( M ) ⊆ M ) k ≥ 0 ( Pre k ( R ))) Backward procedure ( � Drawbacks: Not always computable for infinite state systems Numerical instability for contractive systems G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 18 / 34

  51. State Decomposition Classical Safety Control Synthesis (Ramadge-Wonham) Given a safety area R Problem: Find all the points of R that can be controlled to always stay within R (controllable subset) Alternatively: Find the maximal invariant subset M of R (i.e., largest M ⊆ R such that Post ( M ) ⊆ M ) Backward procedure ( � k ≥ 0 ( Pre k ( R ))) Drawbacks: Not always computable for infinite state systems Numerical instability for contractive systems G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 18 / 34

  52. State Decomposition Classical Safety Control Synthesis (Ramadge-Wonham) Given a safety area R Problem: Find all the points of R that can be controlled to always stay within R (controllable subset) Alternatively: Find the maximal invariant subset M of R (i.e., largest M ⊆ R such that Post ( M ) ⊆ M ) Backward procedure ( � k ≥ 0 ( Pre k ( R ))) Drawbacks: Not always computable for infinite state systems Numerical instability for contractive systems G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 18 / 34

  53. State Decomposition Classical Safety Control Synthesis (Ramadge-Wonham) Given a safety area R Problem: Find all the points of R that can be controlled to always stay within R (controllable subset) Alternatively: Find the maximal invariant subset M of R (i.e., largest M ⊆ R such that Post ( M ) ⊆ M ) Backward procedure ( � k ≥ 0 ( Pre k ( R ))) Drawbacks: Not always computable for infinite state systems Numerical instability for contractive systems G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 18 / 34

  54. State Decomposition Alternative: Reasoning with patterns instead of modes For uncontrollable points, find a pattern (sequence of modes) which makes the point go back to R G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 19 / 34

  55. State Decomposition Alternative: Reasoning with patterns instead of modes For uncontrollable points, find a pattern (sequence of modes) which makes the point go back to R Advantage: uniformity: the same pattern can be applied to a subregion of R (found by “decomposition”) decomposition in regions based on forward computation ( Post ) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 19 / 34

  56. State Decomposition Alternative: Reasoning with patterns instead of modes For uncontrollable points, find a pattern (sequence of modes) which makes the point go back to R Advantage: uniformity: the same pattern can be applied to a subregion of R (found by “decomposition”) decomposition in regions based on forward computation ( Post ) Drawbacks: Intermediate steps may exit from R (safety not ensured for R but for a superset R ∗ of R ) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 19 / 34

  57. State Decomposition Alternative: Reasoning with patterns instead of modes For uncontrollable points, find a pattern (sequence of modes) which makes the point go back to R Advantage: uniformity: the same pattern can be applied to a subregion of R (found by “decomposition”) decomposition in regions based on forward computation ( Post ) Drawbacks: Intermediate steps may exit from R (safety not ensured for R but for a superset R ∗ of R ) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 19 / 34

  58. State Decomposition Sketch of the Decomposition Method Given a zone R G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 20 / 34

  59. State Decomposition Sketch of the Decomposition Method Given a zone R Look for a pattern which maps R into R G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 20 / 34

  60. State Decomposition Sketch of the Decomposition Method Given a zone R Look for a pattern which maps R into R If such a pattern exists, then uniform control over the whole R G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 20 / 34

  61. State Decomposition Sketch of the Decomposition Method Given a zone R Look for a pattern which maps R into R If such a pattern exists, then uniform control over the whole R Otherwise, bisection of R , and search for patterns mapping subparts into R G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 20 / 34

  62. State Decomposition Sketch of the Decomposition Method Given a zone R Look for a pattern which maps R into R If such a pattern exists, then uniform control over the whole R Otherwise, bisection of R , and search for patterns mapping subparts into R In case of failure, iterate the bisection G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 20 / 34

  63. State Decomposition More Formally Given a set R , find by iterated bisection a decomposition ∆, i.e., a set of couples { ( V i , π i ) } i ∈ I such that: G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 21 / 34

  64. State Decomposition More Formally Given a set R , find by iterated bisection a decomposition ∆, i.e., a set of couples { ( V i , π i ) } i ∈ I such that: � i ∈ I V i = R G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 21 / 34

  65. State Decomposition More Formally Given a set R , find by iterated bisection a decomposition ∆, i.e., a set of couples { ( V i , π i ) } i ∈ I such that: � i ∈ I V i = R ∀ i ∈ I Post π i ( V i ) ⊆ R . G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 21 / 34

  66. State Decomposition More Formally Given a set R , find by iterated bisection a decomposition ∆, i.e., a set of couples { ( V i , π i ) } i ∈ I such that: � i ∈ I V i = R ∀ i ∈ I Post π i ( V i ) ⊆ R . G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 21 / 34

  67. State Decomposition Control Induced by the Decomposition The decomposition ∆ = { ( V i , π i ) } i ∈ I induces a control as follows: G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 22 / 34

  68. State Decomposition Control Induced by the Decomposition The decomposition ∆ = { ( V i , π i ) } i ∈ I induces a control as follows: 1 x ( t ) ∈ R , therefore ∃ i ∈ I such that x ( t ) ∈ V i G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 22 / 34

  69. State Decomposition Control Induced by the Decomposition The decomposition ∆ = { ( V i , π i ) } i ∈ I induces a control as follows: 1 x ( t ) ∈ R , therefore ∃ i ∈ I such that x ( t ) ∈ V i 2 Apply pattern π i to x ( t ) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 22 / 34

  70. State Decomposition Control Induced by the Decomposition The decomposition ∆ = { ( V i , π i ) } i ∈ I induces a control as follows: 1 x ( t ) ∈ R , therefore ∃ i ∈ I such that x ( t ) ∈ V i 2 Apply pattern π i to x ( t ) 3 At the end of π i , x ( t ′ ) ∈ R , iterate by going back to step (1) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 22 / 34

  71. State Decomposition Control Induced by the Decomposition The decomposition ∆ = { ( V i , π i ) } i ∈ I induces a control as follows: 1 x ( t ) ∈ R , therefore ∃ i ∈ I such that x ( t ) ∈ V i 2 Apply pattern π i to x ( t ) 3 At the end of π i , x ( t ′ ) ∈ R , iterate by going back to step (1) Property Under the induced control, the system always returns in R after each pattern application G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 22 / 34

  72. State Decomposition Control Induced by the Decomposition The decomposition ∆ = { ( V i , π i ) } i ∈ I induces a control as follows: 1 x ( t ) ∈ R , therefore ∃ i ∈ I such that x ( t ) ∈ V i 2 Apply pattern π i to x ( t ) 3 At the end of π i , x ( t ′ ) ∈ R , iterate by going back to step (1) Property Under the induced control, the system always returns in R after each pattern application NB: The basic procedure can be refined with an extended safety set R ∗ in order to guarantee that all the intermediate points are in R ∗ at each sampling time. G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 22 / 34

  73. State Decomposition Trajectory under the induced control G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 23 / 34

  74. Application to Multilevel Converters Application to Multilevel Converters G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 24 / 34

  75. Application to Multilevel Converters Case Study: a Multilevel Converter A prototype built by SATIE Lab for the Farman project BOOST2 The general function of a multilvel converter is to synthesize a desired AC voltage from several levels of DC voltages. G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 25 / 34

  76. Application to Multilevel Converters Application to Multilevel Converter (5 levels) Figure : Electric scheme and ideal output for 5-level converter Objective: Find appropriate switching strategy in order to obtain the desired staircase output voltage while keeping capacitor voltage balancing G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 26 / 34

  77. Application to Multilevel Converters Application of Decomposition Procedure v input = 100 V , R load = 50Ω, C 1 = C 2 = C 3 = 0 . 0012 F , L load = 0 . 2 H , R 1 = R 2 = R 3 = 20 , 000Ω, T = 8 τ = 0 . 02 s (frequency 50Hz) R = [145 , 155] × [95 , 105] × [45 , 55] procedure successful using only one bisection by dimension G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 27 / 34

  78. Application to Multilevel Converters Numerical Simulations of the Capacitor Voltages (a) v C 1 = f ( t ) (b) v C 2 = f ( t ) (c) v C 3 = f ( t ) (d) projection on (e) projection on (f) projection on ( v C 1 , v C 2 ) ( v C 1 , v C 3 ) v C 2 , v C 3 ) G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 28 / 34

  79. Application to Multilevel Converters Numerical Simulation of the Output Voltage G. Feld 2 , L. Fribourg 1 , D. Labrousse 2 , B. Revol 2 , R. Soulat 1 ( 1 LSV, 2 SATIE - ENS Cachan & CNRS) Correct-by-Design Control Synthesis for Multilevel Converters using State Space FSFMA, 13 May 2014 29 / 34

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