Chapter 5: Unfolding Keshab K. Parhi Unf olding P arallel P - - PowerPoint PPT Presentation

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Chapter 5: Unfolding Keshab K. Parhi Unf olding P arallel P - - PowerPoint PPT Presentation

Chapter 5: Unfolding Keshab K. Parhi Unf olding P arallel P rocessing 2-unfolded (1) (1) (1) B 0,2,4, . A (1) B 0 A 0 2D T = 2ut D A 0 B 0 => A 2 B 2 => A 4 B 4 => .. A 1 B 1 => A 3


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SLIDE 1

Chapter 5: Unfolding

Keshab K. Parhi

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SLIDE 2
  • Chap. 5

2

  • Unf olding ≡ P

arallel P rocessing

A B 2D (1) (1) A0B0=> A2B2=> A4B4=> … .. A1B1=> A3B3=> A5B5=> … .. 2 nodes & 2 edges T∞= (1+1)/ 2 = 1ut

2-unfolded

A0 B0 D (1) (1) A1 B1 D (1) (1) 0,2,4,… . 1,3,5,… . 4 nodes & 4 edges T∞= 2/ 2 = 1ut T’

∞= 2ut

T’

∞= 2ut

  • I n a ‘J ’ unf olded syst em each delay is J -slow =>

if input t o a delay element is t he signal x(kJ + m), t he out put is x((k-1)J + m) = x(kJ + m – J).

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SLIDE 3
  • Chap. 5

3

  • Algorit hm f or unf olding:

For each node U in t he original DFG, draw J node U0 , U1 , U2 ,… , UJ -1 . For each edge U → V wit h w delays in t he original DFG, draw t he J edges Ui → V(i + w)%J wit h (i+w)/ J  delays f or i = 0, 1, … , J -1. U V 37D U0 U3 U2 U1 V3 V2 V1 V0 9D 9D 9D 10D Unf olding of an edge wit h w delays in t he original DFG produces J -w edges wit h no delays and w edges wit h 1delay in J unf olded DFG f or w < J. Unf olding preserves precedence const raint s of a DSP program. w = 37 ⇒(i+w)/ 4 = 9, i = 0,1,2 =10, i = 3

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SLIDE 4
  • Chap. 5

4

P ropert ies of unf olding : Unf olding preserves t he number of delays in a DFG. This can be st at ed as f ollows: w/ J  + (w+1)/ J  + … + (w + J - 1)/ J  = w J -unf olding of a loop l wit h wl delays in t he original DFG leads t o gcd(wl , J) loops in t he unf olded DFG, and each

  • f t hese gcd(wl , J ) loops cont ains wl/ gcd(wl , J ) delays

and J / gcd(wl , J ) copies of each node t hat appears in l. Unf olding a DFG wit h it erat ion bound T∞ result s in a J - unf olded DFG wit h it erat ion bound J T∞ . U T V D 5D 6D U0 U1 U2 V0 V1 V2 T0 T1 T2 2D 2D 2D D D 2D 2D 3-unf olded DFG

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SLIDE 5
  • Chap. 5

5

  • Applicat ions of Unf olding

Sample Period Reduct ion Parallel Processing

  • Sample Period Reduct ion

Case 1 : A node in t he DFG having comput at ion t ime great er t han T∞. Case 2 : I t erat ion bound is not an int eger. Case 3 : Longest node comput at ion is larger t han t he it erat ion bound T∞, and T∞ is not an int eger.

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SLIDE 6
  • Chap. 5

6

Case 1 : The original DFG cannot have sample period equal t o t he it erat ion bound because a node comput at ion t ime is more t han it erat ion bound

I f t he comput at ion t ime of a node ‘U’, t u, is great er t han t he

it erat ion bound T∞, t hen t u/ T ∞ - unf olding should be used. I n t he example, t u = 4, and T∞ = 3, so 4/ 3 - unf olding i.e., 2- unf olding is used.

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SLIDE 7
  • Chap. 5

7

  • Case 2 :

The original DFG cannot have sample period equal t o t he it erat ion bound because t he it erat ion bound is not an int eger. I f a crit ical loop bound is of t he f orm t l/ wl where t l and wl are mut ually co-prime, t hen wl-unf olding should be used. I n t he example t l = 60 and wl = 45, t hen t l/ wl should be writ t en as 4/ 3 and 3-unf olding should be used.

  • Case 3 : I n t his case t he minimum unf olding f act or t hat allows

t he it erat ion period t o equal t he it erat ion bound is t he min value of J such t hat JT∞ is an int eger and is great er t han t he longest node comput at ion t ime.

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SLIDE 8
  • Chap. 5

8

  • Parallel Processing :

Word- Level P arallel P rocessing Bit Level P arallel processing Bit -serial processing Bit -parallel processing Digit -serial processing

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SLIDE 9
  • Chap. 5

9

  • Bit -Level Parallel Processing

Bit -parallel

a0 a1 a2 a3 b0 b1 b2 b3 Bit -serial a3 a2 a1 a0 b3 b2 b1 b0 Digit -Serial (Digit -size = 2) a2 a0 a3 a1 b2 b0 b3 b1 Bit -serial adder D a3 a2 a1 a0 b3 b2 b1 b0 s3 s2 s1 s0 4l+1,2,3 4l+0

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SLIDE 10
  • Chap. 5

10

  • The f ollowing assumpt ions are made when

unf olding an edge U→V :

The wordlengt h W is a mult iple of t he unf olding f act or J , i.e. W = W’J . All edges int o and out of t he swit ch have no delays.

  • Wit h t he above t wo assumpt ions an edge U→V can

be unf olded as f ollows :

Writ e t he swit ching inst ance as Wl + u = J ( W’l + u/ J  ) + (u%J ) Draw an edge wit h no delays in t he unf olded graph f rom t he node Uu%J t o t he node Vu%J, which is swit ched at t ime inst ance ( W’l + u/ J  ) .

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SLIDE 11
  • Chap. 5

11

Example :

U V

12l + 1, 7, 9, 11

U0 V0 U1 V1 U2 V2

4l + 3 4l + 0,2 4l + 3 Unf olding by 3 To unf old t he DFG by J =3, t he swit ching inst ances are as f ollows 12l + 1 = 3(4l + 0) + 1 12l + 7 = 3(4l + 2) + 1 12l + 9 = 3(4l + 3) + 0 12l + 11 = 3(4l + 3) + 2

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SLIDE 12
  • Chap. 5

12

  • Unf olding a DFG cont aining an edge having a swit ch and a

posit ive number of delays is done by int roducing a dummy node. A B C 2D 6l + 1, 5

6l + 0, 2, 3, 4

A B C D 2D

6l + 1, 5 6l + 0, 2, 3, 4

I nsert ing Dummy node A0 A1 A2 D1 D0 D2 B2 B1 B0 C

2

C

1

C

2l + 0 2l + 1 2l + 0 2l + 1 2l + 1 2l + 0

D D

B0 A2 B1 B2 A0 C C

1

C

2

D

2l + 0 2l + 1 2l + 0 2l + 1

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SLIDE 13
  • Chap. 5

13

  • I f t he word-lengt h, W, is not a mult iple of t he

unf olding f act or, J , t hen expand t he swit ching inst ances wit h periodicit y lcm(W,J )

  • Example: Consider W=4, J =3. Then lcm(4,3) = 12.

For t his case, 4l = 12l + {0,4,8), 4l+1 = 12l + {1,5,9}, 4l+2 = 12l + {2,6,10}, 4l+3 = 12l + {3,7,11}. All new swit ching inst ances are now mult iples of J =3.