Challenges in Building Quantum Computers Anastasiia Butko - - PowerPoint PPT Presentation

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Challenges in Building Quantum Computers Anastasiia Butko - - PowerPoint PPT Presentation

Sep 13, 2023 106 likes •545 views

Challenges in Building Quantum Computers Anastasiia Butko Computational Research Division (CRD) Lawrence Berkeley National Laboratory (LBNL) July 7, 2020 Computing Sciences Summer Student Program Talk Berkeley, CA Challenges in Building

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Challenges in Building Quantum Computers

Anastasiia Butko

Computational Research Division (CRD) Lawrence Berkeley National Laboratory (LBNL)

July 7, 2020 Computing Sciences Summer Student Program Talk Berkeley, CA

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Quantum Computer

Why?

Challenges in Building Quantum Computers

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SLIDE 3 Kunle Olukotun, Lance Hammond, Herb Sutter, Mark Horowitz and extended by John Shalf.

As the Moore’s Law ending...

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SLIDE 4 The future of computing beyond Moore’s Law, J. Shalf

Continued Performance Improvements

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As the Moore’s Law ending...

Number factorization problem

We are here
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Quantum Computer

Myth or Reality?

Challenges in Building Quantum Computers

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SLIDE 7

Myth or Reality?

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SLIDE 8 QNTM: Entering the era of Quantum Computing www.qntm.be

Timeline

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SLIDE 9 QNTM: Entering the era of Quantum Computing www.qntm.be
  • Quality of qubits
  • Number of qubits
  • ?

Timeline

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Challenges

Quality

Challenges in Building Quantum Computers

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Quality of Qubits

Extremely sensitive to noise

▪ from outside environment ▪ from neighboring qubits ▪ from ``nowhere’’

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Bloch sphere

Research directions

▪ noise modeling ▪ noise mitigation ▪ qubit isolation ▪ error correction

▫ remove ignore

|0> |1>

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Quality of Qubits

Has limited lifetime

▪ depends on technology

Superconducting Qubits: Current State of Play, Kjaergaard et al.

Research directions

▪ material science/technology

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Challenges

Number of Qubits

Challenges in Building Quantum Computers

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SLIDE 14

Number of Qubits

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Universal Quantum

Number of Qubits

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Number of Qubits

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Number of Qubits

D-Wave Quantum Annealers

▪ Chimera topology (not all-to-all connectivity) ▪ Number of logical qubits << physical qubits

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Challenges

Anything else?

Challenges in Building Quantum Computers

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Quantum Computer Accelerator

Inaccuracy of terminology

▪ Quantum computer ≠ Quantum Processing Unit (QPU)

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Quantum Computer Accelerator

Cryogenic Control Architecture for Large-Scale Quantum Computing, J. M. Hornibrook et al., Phys. Rev. Applied 3, 024010, (2015)

Inaccuracy of terminology

▪ Quantum computer ≠ Quantum Processing Unit (QPU) ▪ Quantum computer = QPU + Control Hardware

QPU User
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▪ DOE funded cross-disciplinary project

▫ Open collaboration ▫ $30 million over 5 years ▫ quantum physicists (QNL, MIT LL) ▫ material scientists (MF) ▫ computer scientists (CRD) ▫ engineers (ATAP) ▫ industry partners

Advanced Quantum Testbed (AQT)

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Challenges

Control System

Challenges in Building Quantum Computers

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Main concepts

Theory

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Main concepts

Practice Theory

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Main concepts

Practice Theory

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Control System Architecture

Locality & Functionality

Challenges in Building Quantum Computers

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Traditional User-to-QPU path

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Bringing intelligence to the edge

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Quantum Control Processor

What is a measure of success?

Challenges in Building Quantum Computers

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Quantum Control Processor success

FLOPS? Energy? Execution time? Power consumption?

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Quantum Control Processor success

FLOPS? Energy? Execution time? Power consumption? Task #1: Provide control pulses on time

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Quantum Control Processor success

FLOPS? Energy? Execution time? Power consumption? Task #1: Provide control pulses on time

Timestamp 0 Timestamp 1

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Quantum Control Processor success

FLOPS? Energy? Execution time? Power consumption? Task #1: Provide control pulses on time

Timestamp 0 Timestamp 1 X

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Quantum Control Processor success

FLOPS? Energy? Execution time? Power consumption? Task #1: Provide control pulses on time

Sub-circuit complexity lower higher

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Quantum Control Processor success

▪ fast -feedback loop & bit manipulation

The University of Melbourne Topological Quantum Error Correction (TopQEC) group
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Control processor speed estimates

RISC assembly MM control interpretation per one cycle

▪ 4 instructions/gate → 12 operations/gate ▪ N qubits → 12*N operations/gate ▪ gate delay → 20ns, 10ns, 5ns

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Quantum Control Processor

Architecture

Challenges in Building Quantum Computers

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QUASAR: quantum extension for RISC-V

We proposed:

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QUAntum instruction Set ARcitecture (QUASAR) extension to the widely used open source RISC-V architecture.

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Timing Constraint Satisfaction

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System Architecture Implementation

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“

Advanced Quantum Testbed

https:/ /berkeleyquantum.org ▪ arXiv:1909.11719 ▪ open-source release

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Thank you for your attention. Questions?