Carbon-Based Electronics: Will there be a carbon age to follow the - - PowerPoint PPT Presentation

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Carbon-Based Electronics: Will there be a carbon age to follow the - - PowerPoint PPT Presentation

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Carbon-Based Electronics: Will there be a carbon age to follow the silicon age? Jeffrey Bokor EECS Department UC Berkeley jbokor@eecs.berkeley.edu Solid State Seminar 9-13-13 1 Outline Review of development of Carbon Nanotube (CNT)

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Carbon-Based Electronics: Will there be a carbon age to follow the silicon age? Jeffrey Bokor EECS Department UC Berkeley jbokor@eecs.berkeley.edu

Solid State Seminar 9-13-13

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Outline

  • Review of development of Carbon Nanotube (CNT)

transistors (for logic)

– Issues, progress, prospects

  • Advent of graphene

– Recognition of promise of graphene nanoribbons (GNRs) for logic transistors – Issues, progress, prospects

  • Summary of prospects for carbon transistors
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C60: Birth of carbon Nanotech era

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Main properties of carbon nanotubes predicted before discovery!

semiconductor metal

Applied Physics Letters

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Single-wall carbon nanotubes discovered in carbon ‘soot’ by TEM

Iijima and Ichihashi, Nature (1993) [NEC]

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CNT Transistor

Tans, et al., Nature (1998) [Dekker group, Delft] Laser vaporization method for CNT synthesis

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Catalytic CVD growth of CNTs on a surface

Kong, et al, Nature (1998) [Dai group, Stanford] Catalyst: Fe(NO3)3⋅9H2O/alumina/methanol suspension CVD at 1000C with methane

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  • 25
  • 20
  • 15
  • 10
  • 5

IDS (A)

  • 0.4 -0.3 -0.2
  • 0.1

0.0 VDS (V)

0.2 V

  • 0.1 V
  • 0.4 V
  • 0.7 V
  • 1.0 V
  • 1.3 V

Self-Aligned Ballistic FETs w/High-k

0.5 10

  • 9

10

  • 8

10

  • 7

10

  • 6

10

  • 5
  • IDS (A)
  • 1.5 -1.0 -0.5

0.0 V

G (V)

VDS = -0.1,-0.2,-0.3 V d~1.7 nm L ~ 50 nm

  • Pd zero-barrier height contact
  • > 5 mA/um at Vg = VDS =0.4V

Javey, et al, Nano Lett. (2004) [Dai group, Stanford]

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High Performance p- and n-FETS

Javey, et al, Nano Lett. (2005) [Dai group, Stanford]

  • Doping by adsorption
  • Lg = 80nm
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CNT-CMOS Integration Chip

 NMOS binary tree 11-bit decoder  2048 back-gated CNT transistors  >4000 Si NMOS transistors, 1 m Microlab

baseline process Tseng, et al, Nano Lett. (2004) [UCB/Stanford, Bokor/Dai groups]

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Carbon Nanotube + Silicon MOS Integrated Circuit

  • 15 -10 -5

5 10 15 10-8 10-7 10-6 1x10-5 Imin Ion Id (A) Vgs (V)

1 2 3 4 5 6 7 50 100 150 209 Devices Total: 523 devices Semiconducting nanotubes only counts Log (on/off)

Tseng, et al, Nano Lett. (2004) [UCB/Stanford, Bokor/Dai groups]

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Direct correlation to diameter variation

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 10-6 1x10-5 Ion (A) Diameter (nm) Ion, Vgs-Vt=-7v 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 10-12 10-11 1x10-10 1x10-9 1x10-8 1x10-7 1x10-6 Measurement Limit Imin (A) Diameter (nm)

1 tube per device

  • 15 -10 -5

5 10 15 10-11 1x10-10 1x10-9 1x10-8 1x10-7 1x10-6 1x10-5 Id (A)

Vgs (V) d=2.9nm d=2.2nm d=1.1nm

Tseng, et al, Nano Lett. (2006) [UCB, Bokor group]

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Parallel Tube CNTs

  • To get large drive, need to stack multiple tubes in

parallel with common contacts, gate

  • Important for ultimate circuit application
  • Do parallel array currents add?
  • How close can tubes be stacked?
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10

  • 10

10

  • 8

10

  • 6

10

  • 4
  • IDS (A)
  • 1

1 VG (V)

Parallel Array of Self-Aligned Ballistic FETs

  • 200
  • 150
  • 100
  • 50

IDS (A)

  • 0.6
  • 0.4
  • 0.2

0.0 VDS (V)

VGS = -0.9 to 0.3 V in 0.2 V steps

D S G D G G G D S S

SWNT

S

VDS = -0.1,-0.2,-0.3 V

  • 1st demonstration of a parallel array
  • ~200 uA of current for the array of 8 tubes.

Javey, et al., Nano Lett. (2004) [Stanford, Dai group]

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CNT Array Density Limited by Screening

Wang, et al. SISPAD (2003) [IBM]

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CNT Array Transistor Circuit Performance

Jie, et al., ISSSC (2007) [Stanford/USC, Wong/Mitra/Zhou groups]

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Vision for CNT channel array MOSFETs

  • Array of 1D channels,

densely packed

  • Density 200-250 per m
  • No metallic tubes
  • Narrow diameter

distribution

Bulk Dielectric k2

HfO2

Lgc Lg pitch CNTs

  • r

SNWs

Gate Dielectric k1

Metal Gate Substrate

S D

Bulk Dielectric k2

HfO2

Lgc Lg pitch CNTs

  • r

SNWs

Gate Dielectric k1

Metal Gate Substrate

S D

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A Multiple Growth Strategy to High Densities

Hong, et al, Adv. Mat. (2010) [UIUC, Rogers group]

  • Single-crystal quartz growth substrate
  • “Epitaxial” CNT growth
  • Layer transfer to Si wafer
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Density Scaling by Multiple Transfers

as grown: 15/um transferred: 15/um 2X transfer: 29/um 4X transfer: 55/um

Wang, et al., Nano Res. (2010) [USC, Chou group] Removal of m-tubes by ‘breakdown’

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Coat with small molecule film Induce Joule heating selectively in m‐SWNTs to form trenches by thermocapillarity Si (p++) SiO2 S M S M S S Si (p++) M M SiO2 O2 plasma etch exposed m‐SWNTs Remove film and electrodes; build circuits on remaining s‐SWNTs S S Si (p++) SiO2 S S Si (p++) SiO2

Selective Removal of m-tubess From Aligned Arrays

  • J. Rogers group, UIUC
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Dynamics of Thermocapillary Flow

t= 0 0.1 1 10 100 300 s

2 m

Joule Heating by a SWNT (∆T~5-15C) Jin, et al., Nat. Nano. (2013) [UIUC, Rogers group] Heating options:

  • Gated electrical Joule heating
  • Selective laser absorption
  • Selective microwave absorption
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Solution phase nanotube ‘sorting’/purification

Arnold, et al., Nat. Nano. (2006) [Northwestern, Hersam group] “Density gradient” centrifugation

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Electrical results on sorted CNTs

Arnold, et al., Nat. Nano. (2006) [Northwestern, Hersam group] Percolating network transistor Sorted tube transistor high on/off ratio

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DNA sequence specific wrapping for sorting

Tu, et al., Nature (2009) [Dupont, Zheng group] “size exclusion” chromatography

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Purified Single Chirality (10,5) SWNTs

200nm

(10,5) Starting HiPco material Separated SWNTs (10,5)

Zhang, et al, JACS (2009), [Stanford/Dupont, Dai/Zheng groups] DNA used: (TTTA)3T

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FETS with 99% Semiconducting Tubes

10

  • 14

10

  • 13

10

  • 12

10

  • 11

10

  • 10

10

  • 9

10

  • 8

10

  • 7

10

  • 6

10

  • 5
  • Ids(A)
  • 2
  • 1

1 2 Vgs(V)

1000mV 500mV 100mV 10mV

100nm S D

< 2 2-4 4-6 > 6 10 20 30 40

Percentage(%)

lo g(Io n/Io ff)

Mixed Purely semiconducting

Average 15 tubes per device Ion/Ioff >102 : 88% semiconducting tubes: 99% (0.9915 ~ 88%) Mostly (10,5) SWNTs Zhang, et al, JACS (2009), [Stanford/Dupont, Dai/Zheng groups]

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Solution phase array assembly by Langmuir- Blodgett technique

Li, et al. JACS (2007) [Stanford, Dai group] ~80/um ~70/um

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Solution processed CNTs are as good as CVD tubes at nanoscale Lg

Choi, et al., ACS Nano (2013) [UCB, Bokor/Javey groups] Franklin and Chen,

  • Nat. Nano. (2010)

[IBM CVD tubes

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Ultimate scaling study

GAA NW SG AGNR GAA CNT DG UTB Also DG AGNR

  • M. Luisier (Purdue)
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Device Characteristics:

  • All: Lg=5nm, VDD=0.5 V, EOT=0.64nm (3.3nm of HfO2 with εR=20)
  • SG and DG AGNR: width=2.2nm, normalization by width
  • GAA CNT: diameter=1.58, 1.0, and 0.6 nm, normalization by diameter
  • GAA and -NW: Si, diameter=3nm, transport=<110>, 1% uniaxial strain
  • DG UTB: Si, body=3nm,, transport=<110>, 1% uniaxial strain

Simulation Approach:

  • Same quantum transport simulator for all devices based on Non-equilibrium

Green’s Functions (NEGF) formalism with atomistic resolution of simulation domain and finite element method for Poisson equation

  • Bandstructure model: single-pz for carbon and sp3d5s* for silicon (tight-binding)
  • Ballistic limit of transport (no electron-phonon scattering nor interface

roughness taken into account)

  • Intrinsic device performances (no contact series resistances included)
  • No gate leakage currents included
  • No structure optimization for any of the selected devices

Simulation parameters and assumptions

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Id-Vgs at Vds=0.5V in carbon-based Devices

SiO2 HfO2 AGNR width: 2.2nm / CNT diameter: 1.58nm / Band Gap Eg=0.56 eV

  • Same EOT gives very different electrostatic gate-channel coupling

EOT=0.64nm EOT=0.64nm

  • M. Luisier (Purdue)
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Gate Dielectric Effect In Carbon-Based Devices

Comparison of Conduction Band Edge and Spectral Current in Single-Gate AGNR with 0.64nm SiO2 (εR=3.9) and 3.3nm HfO2 (εR=20) => same EOT=0.64nm OFF- state SiO2 HfO2

  • Effective channel length is longer for the thicker HfO2
  • Barrier widens and tunneling current drops
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Extreme (sub-10 nm S-D Tunneling regime) d=1.58 nm CNT FETs

Transfer Characteristics Sub-threshold swing

Vds=0.5V

  • Bandgap 0.56 eV GAA- CNT (d=1.58 nm) scales poorly

5nm≤Lg≤12nm

Vds=0.5V d=1.58 nm 3.3nm HfO2 EOT=0.64nm

  • M. Luisier, et al., IEDM (2011)

[Purdue/MIT/UCB, Lundstrom/Antoniadis/Bokor groups]

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Transfer Characteristics Sub-threshold Slope

Gate-length trend for 1 nm CNTs

  • Bandgap 0.8 eV GAA- CNT (d=1.0 nm) scales better
  • M. Luisier, et al., IEDM (2011)

[Purdue/MIT/UCB, Lundstrom/Antoniadis/Bokor groups]

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Transfer Characteristics

Id-Vgs at Vds=0.5V in CNT FETs with d=0.6nm and 5≤Lg≤12 nm

Gate-length trend for 0.6 nm CNTs

Sub-threshold Slope

  • Bandgap 1.4 eV GAA- CNT (d=0.6 nm) scales well
  • M. Luisier, et al., IEDM (2011)

[Purdue/MIT/UCB, Lundstrom/Antoniadis/Bokor groups]

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  • CNT with d=0.6nm and

NW with d=3nm have same band gap Eg=1.4eV

  • CNT with d=1.0nm has

band gap Eg=0.817eV

Comparison of different channel materials

Id-Vgs at Vds=0.5V in CNT, NW, and UTB Devices

3.3nm HfO2, EOT=0.64nm

  • Bandgap 0.8 eV GAA-CNT (d=1.0 nm) scales poorly
  • Bandgap 1.4 eV GAA-CNT (d=0.6 nm) scales well
  • Si NW (d=3 nm) scales very well due to high-mass and band-gap
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9 nm CNT transistor

2012

(5 nm) (20 nm)

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Monolithic 3D CNT Circuits!

Hai, et al., IEDM (2010) [Stanford, Mitra/Wong groups]

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Graphene

Forms of graphene Graphene resistivity Geim and Novoselov, Nat. Mat. (2007) [Manchester]

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Bandgap Prediction for Graphene Nanoribbons

Son, et al., PRL (2006) [UCB, Louie group]

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Bandgap Measurements of Etched GNRs

Han, et al., PRL (2007) [Columbia, Kim group]

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GNR formation by unzipping CNTs

Jiao, Nat. Nano. (2010) [Stanford, Dai group]

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0.5 0.4 0.3 0.2 0.1 0.0 Eg(eV) 50 40 30 20 10 W (nm) 10 10

1

10

2

10

3

10

4

10

5

10

6

10

7

Ion/Ioff 50 40 30 20 10 W (nm)

) / exp( /I I

  • ff
  • n

T k E

B g

   

nm W eV Eg 8 . 

Li, et al. Science (2008) [Dai group]

All sub-10nm GNRs are semiconducting Ion currents few uA

GNR Bandgap vs. width

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Bottom-up Synthesized GNRs

Cai et al. Nature (2010) [EMPA (Switzerland), Fasel group]

  • Atomically perfect

edges!

  • 7 C atoms wide
  • W = 0.74 nm!
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Aligned Growth – Bandstructure Measured

Ruffieux, et al. ACS Nano (2012) [Fasel group] m* = 0.21 me Eg = 2.3 eV ~2 nm pitch!

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Synthesized GNR Transferred to SiO2

Bennett, et al., unpublished [UCB, Bokor/Crommie/Fischer groups]

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Synthesized GNR Transistor Results

Bennett, et al., unpublished [UCB, Bokor/Crommie/Fischer groups]

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Wider GNRs Synthesized with 1.4 eV Gap

Chen, et al., ACS Nano (2013) [UCB, Fischer/Crommie groups]

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Single-Molecule Heterostructures

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Summary/Outlook

  • CNT and GNR both promising candidates for

CMOS channel material for  8 nm gate length

  • Why?
  • High drive at low V
  • Good scalability
  • 3D layer stacking:

10 layers = 3 nodes on roadmap!

  • More work needed:
  • Purified chirality for tubes
  • Longer, wider GNRs
  • Dense aligned arrays
  • Low resistance contacts
  • GSR opportunities in my group