Bluering Prototype System Results G. Hampson, W. Cheng, D. - - PowerPoint PPT Presentation

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Bluering Prototype System Results G. Hampson, W. Cheng, D. - - PowerPoint PPT Presentation

Bluering Prototype System Results G. Hampson, W. Cheng, D. Humphrey, J. Bunton, P. Roberts, K. Bengston, R. Beresford, Y. Chen, R. Chekkala 22 nd September 2020 RadioNet Workshop: Future Trends in Radio Astronomy Instrumentation Bluering


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SLIDE 1

Bluering Prototype System Results

  • G. Hampson, W. Cheng,
  • D. Humphrey, J. Bunton,
  • P. Roberts, K. Bengston,
  • R. Beresford, Y. Chen,
  • R. Chekkala

22nd September 2020

RadioNet Workshop: Future Trends in Radio Astronomy Instrumentation

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SLIDE 2

Bluering Aims

  • To develop a generic receiver

○ Using “RFSOC” = Radio Frequency System On Chip ○ Tailored RF front end to suit most types of astronomy antenna systems ○ Coax connected to enable high dynamic range RF front ends that can be operated with RFI

  • RFSOC signal processing capabilities - a powerful

DSP FPGA too

○ Can beamform at the antenna (if only limited # of beams) ○ Can calculate correlations, time pulsars, and RFI mitigation

  • Integration results in a cost, size and power

efficient receiver

  • Optical connectivity to backend

○ Optical clocks and control ○ Optical data path out

  • This presentation shows how far we have come ...
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SLIDE 3

19” Rack

Bluering System View

  • Each Bluering system contains a number of “Razorbacks”

(containing the RFSOC), plus supporting equipment

  • There are few central services required to operate the Bluering systems

M&C Server Razorback (RFSOC) Razorback (RFSOC) Optical Circuit AC-to-48V Cooling Irukandji White Rabbit Master WR Slave Link to DSP Backend Coax (2 per antenna) Fibre (WR, 1GbE,

*GbE)

# Remote Systems

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SLIDE 4

Bluering = Taipan + Razorback + Irukandji

  • Taipan is a customisable RF module
  • Razorback contains the Xilinx RFSOC plus:

○ Synthesizer for ADC sample clock and LO generation ○ DDR4 for transient data capture (raw, filterbank, beam, …) ○ MBO for 10GbE ring/star beamformer data, 1GbE, timing and calibration signals ○ Q/SFP for beam output (short or long distance)

  • Irukandji distributes

○ Timing, Calibration, 1GbE (M&C) 48/ 12V 48V (Isolated) 32 RF Signals (coax) 32 RF Chains MBO RFSOC DDR4 DC/DC Q/SFP To beamformer/ correlator/ capture Synth

Taipan

Network, Timing, Calibration

Irukandji

RAZORBACK

Optical Beamformer Network

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SLIDE 5

Razorback Board

  • RF inputs (Taipan)

○ 16 RF customisable modules (coax/RFOF, frequency, gain, etc.)

  • Optical outputs

○ 40/100GbE QSFP ○ 10/25GbE SFP ○ 12x10GbE MBO

  • RFSOC FPGA

○ 2560 channel oversampled filterbank ○ 2GSPS results in 781kHz channels (926kSPS)

  • Optical inputs

○ 1GbE M&C (SFP) ○ Reference (125MHz) ○ 1 pulse-per-second ○ Calibration signal

  • 8GB DDR4 memory

○ Also SDcard and 8GB iNAND

  • 48V power

x8x2

  • Clock and LO generation

and distribution

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SLIDE 6

Taipan RF Card for MWA antenna

  • Very simplified (!!!) RF signal chain diagram shown below
  • Taipan powers each antenna’s LNA - no extra cables
  • 22dB of sky brightness slope is partially compensated to

extend dynamic range - a 12dB improvement

  • All 12 RFSOC ADC bits processed in beamformer DSP
  • The cost per RFSOC ADC input is halved by using a mixer

architecture to sample both polarisations in the same ADC

To Dual Pol Antenna (power over coax) LPF C LPF C BPF RFSOC ADC 125MHz Reference PLL PLL 875MHz 2000MHz 12-bits to DSP x16 for RFSOC Taipan RF board

Taipan

Calibration Signal

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SLIDE 7

Taipan RF Module

RF X 5V-LNA RF Y Cal LO 5V-LO Y-attenuator X-attenuator RF out (to final amplifier and ADC) 5V-RF

Taipan

  • Taipan module is 101.5mm x 30.5mm

○ (purple hashed section in drawing)

  • Several ports around the module provide RF, LO, control, 5V and ground
  • 4-bits of attenuator control are provided for each polarisation
  • Soldered in place
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SLIDE 8

MWA Taipan Module

  • Prototype version
  • Two low cost shields

($1) for first and second stage amplification

  • Razorback contains

final amp and balun

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SLIDE 9

ADC Noise

Taipan Signal Levels

  • RFSOC ADC performance

○ SNR is -150dBFS/Hz or

  • 150+90 = -60dBFS/300MHz

○ SFDR is 85dB ○

https://www.xilinx.com/support/docu mentation/data_sheets/ds926-zynq- ultrascale-plus-rfsoc.pdf

  • ADC similar to RF

spurious

○ IM2 just as important as IM3

  • Attenuator set to 17dB so

ADC input level for 300MHz Sky is -33dBm

○ Can still adjust up and down further with attenuator depending on RFI ADC SNR 60dB ADC SFDR 85dB ADC Full Scale +1dBm Sky noise (300MHz BW) ADC Spurious RFI Spurious Sky 1MHz 25dB 32dB RFI IM2 spurious -50dBc RFI IM3 spurious -89dBc Sky (1MHz BW) 32dB 13dB ADC IM2 85dB ADC IM3 78dB RFI Average 17dB

Slope

Cal Signal

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SLIDE 10

RFI measurements

  • North of Sydney (Wamberal)
  • Near Australia Telescope (Yarrie Lake)
  • Greatest concern (in band) is FM radio

○ Seems to be everywhere - even the MWA site has FM at times

Spatial filtering experiment with the Murchison Widefield Array - G.Hellbourg & I. Morrison, URSI GASS 2020

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SLIDE 11

ADC Capture FB Capture 2GS ADC Coarse Filter bank Quantise, Select & Packetise 10/100 GbE 16-RF Beamformer ADC Statistics Spectrum Maxhold IO Processor & AXI IF Irukandji Attenuators 1pps /BAT 1GbE ADC Sync To PLL 128MHz SysMon monitoring Test Signals Test Packets

Razorback RFSOC Firmware

  • “Standard” Bluering firmware and software
  • Can be customised for any application
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SLIDE 12

LMK04610 Clock Jitter Cleaner CVHD-950 Ultra-Low Phase Noise Oscillator 125MHz 125MHz 125MHz 125MHz 125MHz LMX2594 RF Synthesizer LMX2594 RF Synthesizer ECUO Firefly Rx ECUO Firefly Rx 1pps Manchester Encoded ZU29DR Decode Sync Pulse LMK00304 Differential Clock Buffer LMK00304 Differential Clock Buffer SC4PS-33+ RF Splitter ZU29DR ADC Clocks ZU29DR SysRef & Logic Sync Pulse 2GHz ECUO Firefly Rx High Isolation Resistive RF Splitter Calibration Taipan RF Receivers

Bluering RFSOC Synchronisation

875 MHz

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SLIDE 13

Filterbank Compute

  • 2560 point filterbank,
  • versampled by 32/27,

with 16x2560 FIR taps

○ Using sample clock 2000MHz results in 721kHz channels ○ Can be modified to suit your application

  • Filterbank FPGA resources

○ LUTs : 122911 (29%) ○ DSPs : 2112 (49%) ○ 36K BRAMs : 568 (53%)

  • Filterbank use about ~40W

○ Measure slightly less (data dependent)

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SLIDE 14

Liquid Cooling

  • EMI shielding combined with

liquid cooling

  • Encouraging results so far - no

leaks - good performance

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SLIDE 15

EMI Shielding

  • A critical aspect of Bluering is EMI shielding as its only ~1m from an antenna.
  • This box achieves >90dB shielding effectiveness in the single shielded side

and >150dB in the double

○ Gets very hard to measure

  • 48V power

is filtered many times

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SLIDE 16

First RFSOC ADC samples

  • The RFSOC has an endless number of

configurations - so getting the first ADC samples out is a particularly pleasing moment in time!

  • Here an unfiltered 200MHz signal (that

is locked to the 125MHz reference clock) is input into the ADC

  • The location of the noise is ~right

○ RF in is -20dB and ADC SNR is 60dB, so about 40dB above noise floor ○ But processing gain reduce level of noise by 10log10(16384) = 42dB ○ So peak to noise floor is 40+42=~82dB ○ Measure 155-75=80dB so levels close to right for a first measurement 80dB

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SLIDE 17

Upgrades being made now

  • As with all prototypes there a few bugs!

○ Wrong values, wrong side, or just missing

  • Major upgrades for the optics

○ Originally MBO + QSFP + SFP cages ○ Moving to quad QSFP - similar to Jimble (another CSIRO RFSOC receiver) ○ Enables more data output options ○ QSFP’s are lower cost than MBO now - as it's more of a COTS product

  • RF connector

○ Moving away from ganged RF connector to SMA ○ Using a surface mount connector to improve RF over wider frequency range

  • Taipan module

○ Originally soldered in and potentially difficult to replace ○ Now moving to MMBX solution to enable easy replacement/upgrades

  • Second version available for Christmas
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SLIDE 18

Prototyping Continues

Many thanks to Wan, Keith and David

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SLIDE 19

What are we planning at CSIRO?

  • After completing the second revision of boards we intend to do installation at

the Australia Telescope

  • We have two MWA tiles (each MWA tile requires one Razorback) to install
  • Hoping to use power and fibre connections available at positions along the

array arms

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SLIDE 20

Summary & Conclusions

  • Only a small team of people work on Bluering - but it has come a long way
  • Steady progress on RF side - greatest concern is FM radio
  • RFSOC software and firmware has come along way
  • First ADC results are very promising
  • We still have a lot to do!
  • Really looking forward to demonstrating all aspects of Bluering

at the Australia Telescope

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