Automatic Generation of 100 Gbps Packet Parsers from P4 Description - - PowerPoint PPT Presentation

Automatic Generation of 100 Gbps Packet Parsers from P4 Description

Pavel Ben´ aˇ cek 1 Viktor Puˇ s 1 Hana Kub´ atov´ a 2

1Liberouter

CESNET

2Faculty of Information Technology

Czech Technical University in Prague

H2RC Workshop, November 2015

Ben´ aˇ cek, Puˇ s, Kub´ atov´ a 100 Gbps Packet Parser from P4 H2RC 2015 1 / 12

Introduction

OpenFlow is a very popular protocol for realization of SDN (Software Defined Networking) Pros and Cons:

◮ + Allows us to decouple control and data plane ◮ + Provides a way to fill match tables of switches at runtime ◮ - Not possible to change set of supported protocols (parsers are fixed)

Researchers are looking for a solution of this disadvantage

◮ P4 language is the next step in the SDN concept realization

Our paper introduces a generator which transforms P4 source to the FPGA parser’s architecture

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P4

Programming Protocol-independent Packet Processors Language with relatively simple syntax Provides a way to define packet processing functionality of network devices Defines following aspects of packet processing:

1

Header Formats

2

Packet Parser

3

Table Specification

4

Control Program

5

Action Specification

packet parser definition match to action mapping

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Parser structure

Two basic types of modules are connected to pipeline

1

Protocol Analyzer - understands one protocol from the protocol stack

⋆ Data extraction ⋆ Computes the next protocol type in the stack ⋆ Computes the next protocol starting offset 2

Pipeline - used to tune the final frequency and latency

Unified interface for easy connection of modules

P I P E . P I P E . 1 Ethernet Analyzer IP Analyzer Ethernet Frame

Eth IP TCP

Input

Eth IP

TCP/UDP Analyzer

TCP

P I P E . 2 P I P E . 3 Ben´ aˇ cek, Puˇ s, Kub´ atov´ a 100 Gbps Packet Parser from P4 H2RC 2015 4 / 12

Transformation Algorithm

Structure of protocol analyzer is generated from the P4’s Header Format Parser’s structure is inferred from P4’s Packet Parser

Basic idea of parser’s structure identification

We have to identify the latest usage of the protocol in the parser. Algorithm for the identification of the latest usage: DFS (Depth First Search) This can be done in Parser Graph Representation (PGR)

◮ Directed acyclic graph ◮ Represents relations between protocols ◮ Created from P4 description Ben´ aˇ cek, Puˇ s, Kub´ atov´ a 100 Gbps Packet Parser from P4 H2RC 2015 5 / 12

Transformation Algorithm - Example

Eth VLAN 1 IPv6 2 IPv4 2 Unknown Unknown TCP 3 UDP 3 ICMPv6 3 Unknown ICMP 3 Unknown

Logical model (PGR) Physical model

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Results

We have tested two protocol stacks:

◮ Simple L2 - Ethernet, IPv4/IPv6, TCP/UDP, ICMP/ICMPv6 ◮ Full - Ethernet, 2x VLAN, 2x MPLS, IPv4/IPv6, TCP/UDP, ICMP/ICMPv6

Possible optimizations:

◮ Automatic - Optimizations of internal parser’s structure ⋆ O1 - Offset bus optimization ⋆ O2 - Multiplexer optimization ◮ Manual - Tweaked P4 program (O3)

We performed synthesis for our implementation platform:

◮ Equipped with Xilinx Virtex 7 FPGA ◮ Suports 100 Gbps Ben´ aˇ cek, Puˇ s, Kub´ atov´ a 100 Gbps Packet Parser from P4 H2RC 2015 7 / 12

Results - Latency

50 100 150 10 20 30 40 50 60 70 Throughput [Gbps] Latency [ns] hand,pareto,simple L2 P4,O2,pareto,simple L2 hand,pareto,full P4,O2,pareto,full

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Results - Resources

50 100 150 2000 4000 6000 8000 10000 12000 14000 Throughput [Gbps] Slice LUT [-] hand,pareto,simple L2 P4,O2,pareto,simple L2 hand,pareto,full P4,O2,pareto,full

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Conclusion

We implemented and evaluated our generator of parsers Parsers are capable to process 100 Gbps From presented work we can infer following important results:

1

Ability to generate parsers with equal functionality in shorter time

2

Generated parsers aren’t significantly worse than hand optimized versions created by a professional with many years of experience in HDL coding

Future work:

◮ Deparser - construction of packets ◮ Match+Action tables - general processing of extracted data Ben´ aˇ cek, Puˇ s, Kub´ atov´ a 100 Gbps Packet Parser from P4 H2RC 2015 10 / 12

Thank you for your attention

Pavel Ben´ aˇ cek www.liberouter.org @liberouter Visit our business partner in booth #3011

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Protol Analyzer

Protocol Analyzer (4) Extracted Data (1) Input Data (2) Input O

(3) Input Protocol (6) Output Protocol (5) Output O

Data Extractor Data Extractor Data Extractor

+

Next Protocol Decoder

Length Gen.

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