accelerating pattern matching queries in hybrid cpu fpga
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Accelerating Pattern Matching Queries in Hybrid CPU-FPGA Architectures David Sidler , Zsolt Istv an, Muhsen Owaida, Gustavo Alonso Dept. of Computer Science, ETH Z urich Systems Group, Dept. of Computer Science, ETH Z urich Increasing


  1. Accelerating Pattern Matching Queries in Hybrid CPU-FPGA Architectures David Sidler , Zsolt Istv´ an, Muhsen Owaida, Gustavo Alonso Dept. of Computer Science, ETH Z¨ urich Systems Group, Dept. of Computer Science, ETH Z¨ urich

  2. Increasing amount of user generated data Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 2 / 32

  3. Increasing amount of user generated data Query (WHERE clause) Response time (s) Database MonetDB DBx LIKE ’%Alan%Turing%Cheshire%’ 0.02 0.43 0.36 8.86 REGEXP LIKE(’Alan.*Turing.*Cheshire’) Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 2 / 32

  4. Increasing amount of user generated data Query (WHERE clause) Response time (s) Database MonetDB DBx LIKE ’%Alan%Turing%Cheshire%’ 0.02 0.43 0.36 8.86 REGEXP LIKE(’Alan.*Turing.*Cheshire’) Databases are not suitable for complex text queries! Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 2 / 32

  5. Accelerators to the rescue Using GPUs [1,2] or Xeon Phi [3] to accelerate string matching: High speed-up Data already on accelerator or data movement reduces acceleration benefit Change of data layout Performance depends on pattern complexity [1] E. Sitaridi, K. Ross, GPU-Accelerated string matching for database applications , VLDB Journal, Oct. 2016 [2] C.-H. Lin, et al., Accelerating regular expression matching using hierarchical parallel machines on GPU , GLOBECOM’11 [3] E. Sitaridi, O. Polychroniou, K. Ross, SIMD-Accelerated regular expression matching , DAMON’16 Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 3 / 32

  6. Accelerators to the rescue Using GPUs [1,2] or Xeon Phi [3] to accelerate string matching: High speed-up Data already on accelerator or data movement reduces acceleration benefit Change of data layout Performance depends on pattern complexity Integration into database engine often unclear [1] E. Sitaridi, K. Ross, GPU-Accelerated string matching for database applications , VLDB Journal, Oct. 2016 [2] C.-H. Lin, et al., Accelerating regular expression matching using hierarchical parallel machines on GPU , GLOBECOM’11 [3] E. Sitaridi, O. Polychroniou, K. Ross, SIMD-Accelerated regular expression matching , DAMON’16 Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 3 / 32

  7. Accelerators to the rescue Using GPUs [1,2] or Xeon Phi [3] to accelerate string matching: High speed-up Data already on accelerator or data movement reduces acceleration benefit Change of data layout Performance depends on pattern complexity Integration into database engine often unclear [1] E. Sitaridi, K. Ross, GPU-Accelerated string matching for database applications , VLDB Journal, Oct. 2016 Data partitioning/movement hinders wide-spread [2] C.-H. Lin, et al., Accelerating regular expression matching using hierarchical parallel machines on GPU , adoption of database accelerators! GLOBECOM’11 [3] E. Sitaridi, O. Polychroniou, K. Ross, SIMD-Accelerated regular expression matching , DAMON’16 Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 3 / 32

  8. New hybrid architectures are emerging IBM Power8 + CAPI Intel Xeon+FPGA Source: Heterogeneous computing on POWER, Cesar Diniz Maciel, IBM Source: Intel Xeon+FPGA Platform for the Data Center, PK Gupta, Intel Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 4 / 32

  9. New hybrid architectures are emerging IBM Power8 + CAPI Intel Xeon+FPGA Eliminate the issue of data movement/partitioning Source: Heterogeneous computing on POWER, Cesar Diniz Maciel, IBM Source: Intel Xeon+FPGA Platform for the Data Center, PK Gupta, Intel Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 4 / 32

  10. Intel Xeon+FPGA prototype platform Version 1 (used in this work) Memory Read-heavy: 6.5 GB/s Read/Write: 3 GB/s Mem. controller FPGA cache QPI User Logic Xeon E5 Stratix V Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 5 / 32

  11. Intel Xeon+FPGA prototype platform Version 1 (used in this work) Version 2 Memory Read-heavy: 6.5 GB/s Read/Write: 3 GB/s Mem. controller FPGA cache QPI Larger bandwidth (1xQPI, 2xPCI) User Logic Larger FPGA FPGA in same package Xeon E5 Stratix V (single socket) Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 5 / 32

  12. Intel Xeon+FPGA prototype platform Version 1 (used in this work) Version 2 Memory Read-heavy: 6.5 GB/s Read/Write: 3 GB/s Mem. controller Disclaimer FPGA cache QPI This is an experimental system provided by Intel any results presented are generated Larger bandwidth (1xQPI, 2xPCI) User Logic using pre-production hardware and software, and may not reflect the performance of Larger FPGA production or future systems. FPGA in same package Xeon E5 Stratix V (single socket) Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 5 / 32

  13. FPGA (Field Programmable Gate Array) Routing CLB BRAM CLB CLB BRAM CLB Reprogrammable, load arbitrary circuits CLB BRAM CLB CLB BRAM CLB onto the FPGA CLB BRAM CLB CLB BRAM CLB Once programmed acts similar to an integrated circuit (lower frequency) CLB BRAM CLB CLB BRAM CLB Logic blocks (around 100,000) CLB BRAM CLB CLB BRAM CLB Fast on-chip memory (36K each) CLB BRAM CLB CLB BRAM CLB On-chip Logic memory blocks Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 6 / 32

  14. Parameterizable Regular Expression Engine Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 7 / 32

  15. Regular Expression in Hardware Regex can be mapped to a Non-deterministic finite automata (NFA) NFAs can be efficiently executed on FPGAs [4,5] Regular expression: (ab+ | ba+)c Input: [4] R. Sidhu, V. Prasanna, Fast regular expression matching using FPGAs , FCCM’01 [5] L. Woods, J. Teubner, Complex event detection at wire speed with FPGAs , VLDB’10 Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 8 / 32

  16. Regular Expression in Hardware Regex can be mapped to a Non-deterministic finite automata (NFA) NFAs can be efficiently executed on FPGAs [4,5] a b Regular expression: (ab+ | ba+)c Input: b b S 1 S 3 * a c ¬ a ∧¬ b a S 1 b ¬ a ∧¬ b ∧¬ c c start S 0 S 0 S 3 S 4 start S 0 S 0 a S 5 b ¬ a ∧¬ b ∧¬ c a S 2 b c b ¬ a ∧¬ b S 2 S 4 a a a b [4] R. Sidhu, V. Prasanna, Fast regular expression matching using FPGAs , FCCM’01 [5] L. Woods, J. Teubner, Complex event detection at wire speed with FPGAs , VLDB’10 Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 8 / 32

  17. Regular Expression in Hardware Regex can be mapped to a Non-deterministic finite automata (NFA) NFAs can be efficiently executed on FPGAs [4,5] a b Regular expression: (ab+ | ba+)c Input: a b b S 1 S 1 S 3 * a c ¬ a ∧¬ b a S 1 S 1 b ¬ a ∧¬ b ∧¬ c c start S 0 S 0 S 3 S 4 start S 0 a S 5 b ¬ a ∧¬ b ∧¬ c a S 2 b c b ¬ a ∧¬ b S 2 S 4 a a a b [4] R. Sidhu, V. Prasanna, Fast regular expression matching using FPGAs , FCCM’01 [5] L. Woods, J. Teubner, Complex event detection at wire speed with FPGAs , VLDB’10 Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 8 / 32

  18. Regular Expression in Hardware Regex can be mapped to a Non-deterministic finite automata (NFA) NFAs can be efficiently executed on FPGAs [4,5] a b Regular expression: (ab+ | ba+)c Input: ad b b S 1 S 3 * a c ¬ a ∧¬ b a S 1 b ¬ a ∧¬ b ∧¬ c c start S 0 S 0 S 3 S 4 start S 0 S 0 a S 5 b ¬ a ∧¬ b ∧¬ c a S 2 b c b ¬ a ∧¬ b S 2 S 4 a a a b [4] R. Sidhu, V. Prasanna, Fast regular expression matching using FPGAs , FCCM’01 [5] L. Woods, J. Teubner, Complex event detection at wire speed with FPGAs , VLDB’10 Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 8 / 32

  19. Regular Expression in Hardware Regex can be mapped to a Non-deterministic finite automata (NFA) NFAs can be efficiently executed on FPGAs [4,5] a b Regular expression: (ab+ | ba+)c Input: ada b b S 1 S 1 S 3 * a c ¬ a ∧¬ b a S 1 S 1 b ¬ a ∧¬ b ∧¬ c c start S 0 S 0 S 3 S 4 start S 0 a S 5 b ¬ a ∧¬ b ∧¬ c a S 2 b c b ¬ a ∧¬ b S 2 S 4 a a a b [4] R. Sidhu, V. Prasanna, Fast regular expression matching using FPGAs , FCCM’01 [5] L. Woods, J. Teubner, Complex event detection at wire speed with FPGAs , VLDB’10 Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 8 / 32

  20. Regular Expression in Hardware Regex can be mapped to a Non-deterministic finite automata (NFA) NFAs can be efficiently executed on FPGAs [4,5] a b Regular expression: (ab+ | ba+)c Input: adab b b S 1 S 3 S 3 * a c ¬ a ∧¬ b a S 1 S 1 b ¬ a ∧¬ b ∧¬ c c start S 0 S 0 S 3 S 3 S 4 start S 0 a S 5 b ¬ a ∧¬ b ∧¬ c a S 2 b c b ¬ a ∧¬ b S 2 S 4 a a a b [4] R. Sidhu, V. Prasanna, Fast regular expression matching using FPGAs , FCCM’01 [5] L. Woods, J. Teubner, Complex event detection at wire speed with FPGAs , VLDB’10 Systems Group, Dept. of Computer Science, ETH Z¨ urich SIGMOD 2017 May 16, 2017 8 / 32

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