A Low Power Asynchronous GPS Baseband Processor Benjamin Z. Tang, - - PowerPoint PPT Presentation

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A Low Power Asynchronous GPS Baseband Processor Benjamin Z. Tang, - - PowerPoint PPT Presentation

A Low Power Asynchronous GPS Baseband Processor Benjamin Z. Tang, Stephen Longfield, Jr., Sunil A. Bhave, Rajit Manohar Cornell University Benjamin Tang 05/07/2012 - 1/18 Motivation Augmented reality Micro robotics navigation


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SLIDE 1

A Low Power Asynchronous GPS Baseband Processor

Benjamin Z. Tang, Stephen Longfield, Jr., Sunil A. Bhave, Rajit Manohar

Cornell University

05/07/2012 - 1/18  Benjamin Tang

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SLIDE 2

Motivation

1980s 1990s 2000s 2010s FUTURE

Need continuous

  • peration, much

lower power

Decreasing power, but still too high Augmented reality Micro robotics navigation Location-based services

05/07/2012 - 2/18  Benjamin Tang

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SLIDE 3

How Does GPS Work?

  • GPS L1 civil signal

 L1 carrier  Pseudorandom noise code (PRN)

  • 1ms repeat period, 1.023MHz
  • Unique for each satellite

 Navigation data

τ1 τ3

05/07/2012 - 3/18

τ2

Navigation data PRN code L1 carrier GPS satellite transmitted signal

Receiver Satellite

 Benjamin Tang

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SLIDE 4

How Does Receiver Know…

  • Which satellite’s signal was received?

 Use CDMA

  • Where the satellite is?

 Orbital information in navigation data

  • When was the signal transmitted?

 Navigation data + PRN code phase

Navigation data PRN code L1 carrier GPS satellite transmitted signal 05/07/2012 - 4/18  Benjamin Tang

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SLIDE 5

GPS Receiver

05/07/2012 - 5/18

“Channel”

Medium power <10mW Negligible power More power-hungry ~20-100mW

GPS RF Frontend Digital Samples GPS Baseband Processing GPS Baseband Processing GPS Baseband Processing GPS Baseband Processing GPS Baseband Processing GPS Baseband Processing Measurements & Decoded Message Position calculation

Our focus

 Benjamin Tang

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SLIDE 6

GPS Baseband Processing

05/07/2012 - 6/18

  • Correlation in CDMA

 Generate signal replica  Multiply and accumulate

Digital Samples

Tracking Data Decode Controls Signal Replica Accumulators

Measurements & Decoded Message

~6 MHz , kHz 1kHz – 50Hz

Received Receiver-generated code replica

“Channel” “Correlators” Output once every 1ms

~1.023MHz &

Subsystems should run at their natural frequencies to be power-efficient

 Benjamin Tang

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SLIDE 7

Baseband Processor Design Options

Options Correlators Tracking Decode Option 1 Software Software Software Option 2 Hardware Software Software Option 3 Hardware Hardware Hardware

Typical synchronous design issue: What clocks to use?

  • Shared with front end oscillator crystal

 Optimized for one particular front end  Clock ratios, unnecessary power

  • Independent oscillator crystals

 Optimizations less front end dependent  Clock ratios  Processor clock >> sampling clock, unnecessary power

Our implementation

Asynchronous: Each subsystem

  • nly runs as fast

as it needs to

05/07/2012 - 7/18  Benjamin Tang

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SLIDE 8

Asynchronous GPS Baseband Processor

  • 6 channels
  • Selected optimizations
  • QDI and bundled data

05/07/2012 - 8/18

Digital Samples

Tracking Data Decode Controls Signal Replica Accumulators

Measurements & Decoded Message

Tracking

Digital Samples

Data Decode Controls Signal Replica Accumulators

Measurements & Decoded Message

Buffer

Shared tracking loops

Asymmetric acquisition

QDI Bundled-data

 Benjamin Tang

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SLIDE 9

Asymmetric Acquisition

Full Acquisition (Other receivers) Asymmetric Acquisition (Our receiver) (+) Acquires: satellite ID, code phase

  • ffset and Doppler frequency

(-) Acquires: code phase offset, the rest from software (-) FFT engine and memory or thousands

  • f correlators

(+) Use pre-existing correlators Full acquisition not needed often. Use asymmetric acquisition scheme.

05/07/2012 - 9/18

Digital Samples

Tracking Data Decode

Measurements & Decoded Message

Controls Signal Replica Accumulators

Reduced hardware, Reduced area, Reduced power

 Benjamin Tang

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SLIDE 10

Accumulators

  • Operate at input frequency
  • 6 accumulators per channel
  • 3-bit inputs iteratively added to 16-bit sum
  • Only dump output once every 1ms
  • Higher order bits do not switch often

05/07/2012 - 10/18

3

IN

Reg

OUT

16 16

DUMP

16

DUMP Bit=1 Bit=0 Bit=0

 Benjamin Tang

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SLIDE 11

Accumulators

  • Standard 3-bit accumulator coupled with a 13-bit constant time

counter

  • Concatenate results at DUMP
  • Naïve 16-bit accumulator: ~40μW

Counter-based accumulator: ~10 μW

05/07/2012 - 11/18

4X less power

3

IN

Reg

OUT

16 16

DUMP

16 3

IN

Reg

3 3

Counter

3

Carry

  • ut

{b,a}

a b

13

OUT

16

MSB DUMP  Benjamin Tang

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SLIDE 12

Tracking Loops

  • Tightly coupled feedback loops

 Need to provide updates before the next data sample  Fast tracking loops, power hungry

Digital Samples

Tracking Data Decode Controls Signal Replica Accumulators

Measurements & Decoded Message

Tracking

Digital Samples

Data Decode Controls Signal Replica Accumulators

Measurements & Decoded Message

05/07/2012 - 12/18

Buffer

  • Defer updates

 Slow tracking loops, shared between all channels, saves power

 Benjamin Tang

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SLIDE 13

Tracking Loops

  • Frequency Locked Loop (FLL), Phase Locked Loop

(PLL) and Delay Locked Loop (DLL)

  • Computations involve vector magnitude, arctangent,

multiplication and division operations. Simplify:

 Fixed point arithmetic, bundled-data  Apply Taylor series small angle approximation:  Apply modified version of Robertson approximation:

 

1

tan  

 

2 2 1 1 4 4

max , A I Q I Q Q I     

05/07/2012 - 13/18

Position error increases by ~1m

  • n average

 Benjamin Tang

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SLIDE 14

Receiver Performance Simulations

  • Transistor-level implementation of our system
  • Position accuracy simulation

 60 seconds of signal from commercial GPS signal simulator  No added atmospheric, ionospheric and multipath errors

05/07/2012 - 14/18

3D-RMS error <4m

 Benjamin Tang

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SLIDE 15

Power Simulations

SPICE simulation: Vdd=1V, T=25oC, 90nm technology 1.4mW during continuous tracking

05/07/2012 - 15/18

Subsystems Acquisition (μW) (6 Channels) Track (μW) (6 Channels) Correlators Code Generator 41.8 39.9 Carrier NCO 477.4 442.8 Code NCO 439.4 400.2 Accumulators 367.3 359.9 Tracking Loops 5.5 5.8 Data Decode 1.9 2.1 Controls, Support 240.3 239.1 Total 1.49mW 1.41mW

 Benjamin Tang

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SLIDE 16

Comparison

  • Other contemporary GPS receivers (SOCs with

integrated RF front end and baseband processing)

 MediaTek (J.-M. Wei, et al., ISSCC 2009)  STMicroelectronics (G. Gramegna, et al., JSSC 2006)

05/07/2012 - 16/18

Name This work MediaTek ST Process 90nm 0.11 μm 0.18 μm Voltage (V) 1.0 1.2 1.6 Number of Channels 6 22 12 System Power (mW) 1.4 34.0 56.0 RF Power (mW)

  • 19.5

20.0 Baseband Power (mW) 1.4 14.5 36.0 Baseband Power/Channel (mW) 0.2 0.7 3.0 3-D rms Error (m) 3.9

  • 3.0

3X lower power per channel Comparable accuracy 10X lower power

 Benjamin Tang

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SLIDE 17

Conclusion

  • Transistor-level implementation of a low

power asynchronous GPS baseband processor

 Only runs as fast as it needs to

  • Selected optimizations:

 Asymmetric acquisition  Counter-based accumulators  Shared bundled-data tracking loops

05/07/2012 - 17/18

1.4mW 3D-RMS < 4ms

 Benjamin Tang

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SLIDE 18

Acknowledgement

  • Dr. Paul Kintner
  • DARPA HI-MEMS
  • National Science Foundation

05/07/2012 - 18/18  Benjamin Tang

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SLIDE 19

A Low Power Asynchronous GPS Baseband Processor

Benjamin Z. Tang, Stephen Longfield, Jr., Sunil A. Bhave, Rajit Manohar

Cornell University

 Benjamin Tang