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5nm IMEC ( VLSI 2016) 7nm Leti ( IEDM 2008 ) 10nm Stacked-NWs - PowerPoint PPT Presentation

SCALING ROADMAP 5nm IMEC ( VLSI 2016) 7nm Leti ( IEDM 2008 ) 10nm Stacked-NWs (nanosheets) S. Barraud et al, session 17.6 Vertically Stacked- NanoWires MOSFETs in a Replacement Metal Gate Process with Inner Spacer and SiGe Source/Drain |


  1. SCALING ROADMAP 5nm IMEC ( VLSI 2016) 7nm Leti ( IEDM 2008 ) 10nm Stacked-NWs (nanosheets) S. Barraud et al, session 17.6 Vertically Stacked- NanoWires MOSFETs in a Replacement Metal Gate Process with Inner Spacer and SiGe Source/Drain | 1 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  2. VON NEUMANN PROCESSOR A Von Neumann processor can execute an arbitrary sequence of instructions on arbitrary data but the instructions and data must flow over a limited capacity bus connecting the processor and main memory. Thus, the processor cannot execute a program faster than it can fetch instructions and data from memory. | 2 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  3. NEW COMPUTING PARADIGMS 1000x Source: S Mitra, Stanford Massive parallelism Quantum computing Computation Immersed in Memory | 3 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  4. WHICH DEVICES FOR NEW COMPUTING PARADIGMS? Leti Devices Workshop | Maud Vinet | December 4th, 2016

  5. HIGH DENSITY 3D TECHNOLOGIES 3D Technologies: Several Disruptive Technologies to Look Ahead Dr Olivier Faynot Cu-Cu CoolCube TM Above 2x10 7 vias/mm² demonstrated with CoolCube TM Reachable 3D via pitch @ 14nm = 80nm | 5 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  6. CoolCube TM 1. Top Junction Performance? 2. Inter Metal Interconnects? 3. Is It a Manufacturable Process? 4. Do You Really Benefit From the Lithographic Alignment? | 6 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  7. CoolCube TM 1. Top Junction Performance? Same as bottom one (Pasini, VLSI 2015 and 2016) 2. Inter Metal Interconnects? 3. Is It a Manufacturable Process? 4. Do You Really Benefit from The Lithographic Alignment? | 7 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  8. WHAT ABOUT INTER LAYERS INTERCONNECTS? Line resistivity (Ohm.µm) Copper lines 500° C thermal stability proven C Fenouillet, SSDM 2015 500°C 2h Dielectrics Stability Demonstrated Thickness variation F Deprat, MAM 2016 500° C 2h 500° C 2h | 8 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  9. 300mm WAFERS IN PRODUCTION FAB No macroscopic bonding defects at 300mm wafer scale L Brunet, VLSI 2016 | 9 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  10. NANOMETRIC LITHOGRAPHY ALIGNMENT AT WAFER SCALE No Impact of Layer Deformation During Bonding and Thinning L Brunet, VLSI 2016 | 10 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  11. CoolCube TM � Top Junction Performance � Inter Metal Interconnects � Manufacturable Process � Lithographic Alignment | 11 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  12. 2D TMD (TRANSITION METAL DICHALCOGENIDES) Opportunities for Logic and Non-Volatile Memory Co- Integration S. Bertolazzi ACS nano 2013 A. KIS Spintronics Nanoletters 2014 Spin Logic with Geim et al, Manchester team: ‘ Graphene Ferromagnetic cake’ Memory Memories Quoc An Vu, Nature Comm, 2016 | 12 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  13. 2D TMD LARGE SCALE GROWTH Low-temperature Atomic Layer Deposition of MoS2 using a novel organometallic precursor S. Cadot, et al, ALD 2015 800 ° C ALD of MoS2 on SiO2 | 13 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  14. NANOWIRES TO DESIGN QUANTUM DOTS Quantum Electronic for Efficient Computing Dr Silvano de Franceschi 10 nm Wide Spacers over thin, undoped SOI V. Deshpande, IEDM 2012, M. Vinet IEDM 2013 V DS pFET in the few-hole regime nFET in the few-electron regime 800 ° C FETs are Turned into Single Electron or V GS V GS Single Hole Transistor h=2 h=1 h=0 e=0 e=1 e=2 | 14 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  15. Si SPIN QUBITS EXTEND NANOWIRES OPERATION Definition of a Two-Level System with Long Quantum Coherence Communication Via Tunable E field burs t Vbg Quantum Coupling Between Qubits Control of A Single Qubit: Initialization, Manipulation L. Hutin et al., VLSI Tech. Symp. 2016 S . De Franceschi et al, 13.4 SOI Technology for R. Maurand et al., Nature Comm 2016 Quantum Information Processing (Invited) | 15 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  16. ROADMAP Leti advanced technologies of today | 16 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  17. M. Veldhorst et al., https://arxiv.org/pdf/1609.09700.pdf ROADMAP 2025 2020 Logic in memory 2016 Quantum Computing Neuromorphic computing Leti advanced technologies of today are supporting the shift in computing paradigms | 17 Leti Devices Workshop | Maud Vinet | December 4th, 2016

  18. Leti, technology research institute Commissariat à l’énergie atomique et aux énergies alternatives Minatec Campus | 17 rue des Martyrs | 38054 Grenoble Cedex | France www.leti.fr

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