Warmup Exercise while (node != NULL) { ! Consider a binary tree if - PowerPoint PPT Presentation

Warmup Exercise while (node != NULL) { ! • Consider a binary tree if (node->m_data == value) { ! return node; ! • Left & right pointers } else if (node->m_data < value){ ! • Integer value keys CIS 371 node = node->m_right; ! • Initialized to be fully balanced } else { ! Digital Systems Organization and Design node = node->m_left; ! } ! • Question#1: Computer } ! • The average lookup time for tree of size 1024 (1K = 2 10 ) is 50ns • What about for a a tree of size 1,048,576 (1M = 2 20 )? Unit 0: Introduction • Question #2: • For each item in a tree, look it up (repeatedly) Slides developed by Milo Martin & Amir Roth at the University of Pennsylvania with sources that included University of Wisconsin slides • What is the expected distribution of lookup times over all items by Mark Hill, Guri Sohi, Jim Smith, and David Wood. • For a tree with height h • That is, what does the histogram of lookup times look like? CIS 371 (Martin): Introduction 1 CIS 371 (Martin): Introduction 2 Today’s Agenda • Course overview and administrivia • Motivational experiments • What is computer architecture anyway? • …and the forces that drive it Overview & Administrivia CIS 371 (Martin): Introduction 3 CIS 371 (Martin): Introduction 4

Pervasive Idea: Abstraction and Layering Abstraction, Layering, and Computers • Abstraction : only way of dealing with complex systems App App App Software • Divide world into objects, each with an… System software • Interface : knobs, behaviors, knobs → behaviors ISA • Implementation : “black box” (ignorance+apathy) Mem CPU I/O Hardware • Only specialists deal with implementation, rest of us with interface Transistors • Example: car, only mechanics know how implementation works • Computers are complex, built in layers • Layering : abstraction discipline makes life even simpler • Several software layers: assembler, compiler, OS, applications • Divide objects in system into layers, layer n objects… • Instruction set architecture (ISA) • Implemented using interfaces of layer n – 1 • Several hardware layers: transistors, gates, CPU/Memory/IO • Don’t need to know interfaces of layer n – 2 (sometimes helps) • Inertia : a dark side of layering • 99% of users don’t know hardware layers implementation • Layer interfaces become entrenched over time (“standards”) • 90% of users don’t know implementation of any layer – Very difficult to change even if benefit is clear (example: Digital TV) • That’s okay, world still works just fine • Opacity : hard to reason about performance across layers • But sometimes it is helpful to understand what’s “under the hood” CIS 371 (Martin): Introduction 5 CIS 371 (Martin): Introduction 6 CIS 240: Abstraction and Layering Beyond CIS 240 • Build computer bottom up by raising level of abstraction App App App 330, 341, 350, 390, 391, 534, … System software 380 240 • Solid-state semi-conductor materials → transistors 371 Mem CPU I/O • Transistors → gates • CIS 240: Introduction to Computer Systems • Gates → digital logic elements: latches, muxes, adders • Key insight: number representation • Bottom-up overview of the entire hardware/software stack • Follow on courses look at individual pieces in more detail • Logic elements → datapath + control = processor • CIS 380: Operating Systems • Key insight: stored program (instructions just another form of data) • A closer look at system level software • Another one: few insns can be combined to do anything (software) • Assembly language → high-level language • CIS 277, 330, 341, 350, 390, 391, 455, 460, 461, 462… • A closer look at different important application domains • Code → graphical user interface • CIS 371: Computer Organization and Design • A closer look at hardware layers CIS 371 (Martin): Introduction 7 CIS 371 (Martin): Introduction 8

Hardware Aspect of CIS 240 vs. CIS 371 Why Study Hardware? • It’s required (translation: “it’s good for you”, we think) • Hardware aspect of CIS 240 • Real world impact • Focus on one toy ISA: LC4 • Focus on functionality: “just get something that works” • Without computer architecture there would be no computers • Instructive, learn to crawl before you can walk • Penn legacy • Not representative of real machines: 240 hardware is circa 1975 • First “computer” (ENIAC) was built here • “computer” = general-purpose stored-program computer • CIS 371 • Get a hardware job • De-focus from any particular ISA • Intel, AMD/ATI, IBM, Sun/Oracle, NVIDIA, ARM, • Focus on quantitative aspects: performance , cost, power, etc. HP, TI, Samsung, Microsoft… • Be better at a software job • Apple, Google, Microsoft, etc. • Go to grad school CIS 371 (Martin): Introduction 9 CIS 371 (Martin): Introduction 10 CIS 371 Topics Course Goals • Review of CIS 240 level hardware • Three primary goals • Instruction set architecture • Understand key hardware concepts • Single-cycle datapath and control • Pipelining, parallelism, caching, locality, abstraction, etc. • New • Hands-on design lab • Performance, cost, and technology • A bit of scientific/experimental exposure and/or analysis • Fast arithmetic • Not found too many other places in the major • Pipelining and superscalar execution • Memory hierarchy and virtual memory • Multicore • My role: • Power & energy • Trick you into learning something CIS 371 (Martin): Introduction 11 CIS 371 (Martin): Introduction 12

CIS371 Administrivia The CIS371 Lab • Instructor • Lab project • Prof. Milo Martin (milom@cis), Levine 606 • “Build your own processor” (pipelined 16-bit CPU for LC4) • Use Verilog HDL (hardware description language) • “Lecture” TAs • Programming language compiles to gates/wires not insns • Christian DeLozier & Abhishek Udupa • Implement and test on FPGA (field-programmable gate array) • “Lab” TAs + Instructive: learn by doing • TBD + Satisfying: “look, I built my own processor” • Contact e-mail: • cis371@cis.upenn.edu (goes to me and lecture TAs) • No scheduled lab sessions • Lectures • But you’ll need to use the hardware in the lab for the projects • Please do not be disruptive (I’m easily distracted as it is) • Information on assignments, labs, exams, grading • Forthcoming CIS 371 (Martin): Introduction 13 CIS 371 (Martin): Introduction 14 Lab Logistics CIS371 Resources • Three different web sites • K-Lab: Moore 204 • Course website: syllabus, schedule, lecture notes, assignments • Home of the boards, computers, and later in semester … you • http://www.cis.upenn.edu/~cis371/ • Good news/bad news: 24 hour access, keycode for door lock • “Piazza”: announcements, questions & discussion • “Lab” TA Office hours, project demos here, too • http://www.piazza.com/upenn/spring2012/cis371 • Tools • The way to ask questions/clarifications • Can post to just me & TAs or anonymous to class • Digilent XUP-V2P boards • As a general rule, no need to email me directly • Xilinx ISE • Please sign up! • Warning: all such tools notorious for being buggy and fragile • “Blackboard”: grade book, turning in some assignments • Logistics • https://courseweb.library.upenn.edu/ • Textbook • All projects must run on the boards in the lab • P+H, “Computer Organization and Design”, 4th edition? (~$80) • Boards and lockers handout … sometime in next few weeks • New this year: available online from Penn library! • https://proxy.library.upenn.edu/login?url=http://site.ebrary.com/lib/upenn/Top?id=10509203 • Course will largely be lecture note driven CIS 371 (Martin): Introduction 15 CIS 371 (Martin): Introduction 16

Coursework (1 of 2) Coursework (2 of 2) • A few homework assignments – individual work • Exams • Written questions, occasional short programming • In-class midterm (TBD) • Due at beginning of class • Cumulative final exam (time & date set by registrar) • 2 total “grace” periods, hand in late, no questions asked • One period is to next class (Tue -> Thr, Thr -> Tue) • Attend two research seminars • Max of one late period per assignment • Of four or five at 3pm on Tue/Thur throughout semester • Why? solutions posted after next class • Or watch the recorded video online • Turn in short writeup • 4 labs – all done in groups of 3 • Class participation • Lab 0: getting started, tools intro • Lab 1: arithmetic unit & register file • Lab 2: single-cycle LC4 • Lab 3: pipelined LC4: bypassing, branch prediction, superscalar CIS 371 (Martin): Introduction 17 CIS 371 (Martin): Introduction 18 Grading Academic Misconduct • Tentative grade contributions: • Cheating will not be tolerated • Homework assignments: 15% • General rule: • Labs: 30% • Anything with your name on it must be YOUR OWN work • Research seminars: 2% x 2 = 4% • Example: individual work on homework assignments • Class participation: 1% • Possible penalties • Exams: 50% • Zero on assignment (minimum) • Midterm: 17% • Fail course • Final: 33% • Note on permanent record • Historical grade distribution • Suspension • Median grade: B+ • Expulsion • 2011: A’s: 40%, B’s: 50%, C’s: 7%, D/F’s: 3% • Penn’s Code of Conduct • 2009: A’s: 40%, B’s: 40%, C’s: 15%, D/F’s: 5% • http://www.vpul.upenn.edu/osl/acadint.html CIS 371 (Martin): Introduction 19 CIS 371 (Martin): Introduction 20