vias Objective Objective vias EST-DEM Present and - PowerPoint PPT Presentation

vias – – Objective Objective µ vias µ EST-DEM Present and demonstrate the µ Chemical Vias production process used on CERN Compare with other process used to produce µ vias Patented by CERN, to make microvias on high density printed multilayer circuits of different type, such as: SBU-Sequential Build-up HDI-High Density Interconnected MCM-L-Multi Chip Modules laminated

vias – – Why ??? Why ??? µ vias µ EST-DEM Increase in track density and/or a reduction on layer count Better relation Price/Integration vias µ vias µ Size decreasing of the After PCB is the must electronic components available technology DIL-SMD-BGA- µ BGA-SMART CARD

vias – – Applications Applications µ vias µ EST-DEM Microvias are used to electrically connect a layer n with a layer n+1 in a multilayer printed circuit. High density circuits HDI CERN detector Mobile Phones Digital photo cameras Video cameras Portable PCs Other handheld products

vias – – Types Types µ vias µ EST-DEM Types of Vias: Via holes diameters range Buried Vias from 50 µ m to 300 µ m. Blind Vias Vias Vias By IPC, PCB’s with vias hole sizes smaller then 6 mils (0.15 mm) are called microvias. Through-hole Via

vias – – Production Production µ vias µ EST-DEM Types of Process for the production of µ Vias: Plasma Photo Image vias µ vias µ Laser Chemical Other - NC drilling Our Process - Conductive Ink

vias - - Process Process µ vias µ EST-DEM Photo Image Photo Imageable Dielectric Cu U.V. Exposure Metallization Develop dielectric

vias – – Process Process µ vias µ EST-DEM PLASMA Cu Dielectric Glue Metallization Cu Etching of copper µ -Attack Plasma Etching - Isotropic ½ to 1 hour for plasma etching Minimal Via diameter ≈ 100 µ m

vias – – Process Process µ vias µ EST-DEM LASER Cu Dielectric Glue Metallization Cu Laser Cooper Etching Plasma Cleaning Dielectric Laser Ablation 60 to 80 holes/second For 200 000 holes -> 45 min 1 GEM = 10E6 holes -> 35 hours

vias – – Process Process µ vias µ EST-DEM µ Chemical Via Cu Dielectric Glue Metallization Cu Cooper Etching Glue Etching Dielectric Etching Anisotropic Minimal Via diameter ≈ 40 µ m

vias – – Process Process µ vias µ µ Chemical Chemical Vias Vias EST-DEM µ Plating Resist Development Cu A G Polyimide D Cu Resist Development Resist J B H Copper Etch Resist E U.V. U.V. Light Light Copper etching and resist strip Attack of Polyimide and K Resist Strip I C F U.V. Light U.V. Light

vias – – Process Process µ vias µ µ Chemical Chemical Vias Vias EST-DEM µ U.V. Light Polyimide and Glue etch Laminate adhesive Polyimide coated copper foil Q N L Electroplate Copper R U.V. Light Resist Development Resist application Resist application, mask and O exposure to U.V.. Resist development and copper M etching and strip resist. Copper etch S P

vias – – Advantages Advantages µ vias µ µ Chemical Chemical Vias Vias Process Process EST-DEM µ � Process compatible with standard assembly lines for printed circuits • Simple implementation in the standard PCB lines • Every manufacturer will be able to produce HDI circuits � Week initial investment in the standard PCB production lines (15000 EUR instead 600000 EUR Plus maintenance in Laser option) � Provide smaller companies to enter in this market � Manufacturing cost reduction � Maintenance cost are smaller � Possibility to have a continuous assembly line

vias – – Advantages Advantages µ vias µ µ Chemical Chemical Vias Vias Process Process EST-DEM µ � Can perform vias of any shape and dimension � Global process, all the µ vias in the same layer can be done at the same time, in parallel. � Time of µ vias production don’t depend on the number of µ vias to be produced. The more complex the circuit � more efficient the process Disadvantages: � No possible connection to n+2 layer directly

vias - - Equipment Equipment µ vias µ EST-DEM Controlled chemical procedure, whose main steps are: � Lamination of a metallized sheet of Polyimide on one face with an epoxy glue. � Microvia design etch on the copper through a lithographic photo process � Etching of the Polyimide by using a sequence of simple chemical baths � Elimination of glue by dissolving in the appropriate chemical solution Steps 1 and 2 are standard Steps 3 and 4 are the innovative ones

vias - - Equipment Equipment µ vias µ EST-DEM Main Equipment Pressing Lamination Exposure Development of the resist Etching copper Strip Resist Inspection Polyimide etching Glue etching Metallization

vias - - Equipment Equipment µ vias µ EST-DEM Polyimide etching Etching Polyimide Lessive Water

vias - - Equipment Equipment µ vias µ EST-DEM Glue etching

vias - - Polyimide Polyimide µ vias µ EST-DEM Strips used for measuring the Types of Polyimide: Polyimide thickness. Polyimide 1 [5/50/5 µ m] Polyimide 2 [5/25/5 µ m] Polyimide 3 [5/25/0 µ m] Polyimide 4 [2,5/25/2,5 µ m] The etching of Polyimide. Bellow there is a micrography of the Polyimide 1 [5/50/5 µ m]. Cut AA’ A A’ Cu Kapton Cu Etching Time = 0’’ ZEISS equipment to Cu measure the Kapton Cu thickness of Etching Time ∃ 0’’ Polyimide.

vias - - Polyimide Polyimide µ vias µ EST-DEM Polyimide 1 [5/50/5 µ m] Polyimide 2 [5/25/5 µ m] Polyimide 4 [2,5/25/2,5 µ m] Polyimide 3 [5/25/0 µ m]

vias - - Polyimide Polyimide µ vias µ EST-DEM Thickness of Polyimide vs Etching time measured with ZEISS 60 50 Thickness [um] 40 30 20 10 0 0 5 10 15 20 Time [min] Polyimide 1 used solution Polyimide 1 new solution Polyimide 2 used solution Polyimide 2 new solution Polyimide 4 used solution

vias - - Polyimide Polyimide µ vias µ EST-DEM Thickness of Polyimide vs Etching time measured in the cross section 60 50 Thickness [um] 40 30 20 10 0 0 5 10 15 20 Time [min] Polyimide 1 used solution Polyimide 1 new solution Polyimide 2 used solution Polyimide 2 new solution Polyimide 4 used solution Polyimide 3 used solution

vias - - Polyimide Polyimide µ vias µ EST-DEM Polyimide 1 [5/50/5 µ m] 8 min of etching 4 min of etching 12 min of etching 12 min of etching

vias - - Polyimide Polyimide µ vias µ EST-DEM Polyimide 3 [5/25/0 µ m] 2 min of etching 4 min of etching 4 min of etching

vias – – Vias Vias µ vias µ dimension dimension EST-DEM Polyimide in the top of FR4. Polyimide thickness is 50 µ m 50 µ m A.R.=1 A.R.=0,625 80 µ m

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