[PPT] - Undervolting in WSNs A Feasibility Analysis IEEE World Forum PowerPoint Presentation

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Undervolting in WSNs – A Feasibility Analysis

IEEE World Forum Internet of Things 2014

Ulf Kulau, Felix Büsching and Lars Wolf, March 8, 2014

Technische Universität Braunschweig, IBR

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Undervolting in WSNs – Motivation

Energy Efficiency in WSNs / IoT plays a significant role

Usability, Feasibility, Acceptance...

Limping evolution of batteries (capacity) Various existing approaches on several layers

March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 2

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Undervolting in WSNs – Motivation

Energy Efficiency in WSNs / IoT plays a significant role

Usability, Feasibility, Acceptance...

Limping evolution of batteries (capacity) Various existing approaches on several layers

Physical Layer Data Link Layer Network Layer Application Layer DPM, PVS, DVS, ... TDMA, LPL (X-MAC), ... Routing, RPL, ... Data Management, Compression, ...

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Undervolting in WSNs – Motivation

Existing approaches are inflexible: Real environmental conditions (changes) are less considered They act conservatively (reliability) Usage comes often with some limitations (e.g. waiting periods)

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Undervolting Basics - DVS

ICs are mostly based on CMOS technology

Static power dissipation is negligible Overall power consumption is dominated by pdyn = CL · fcpu · V 2 But the switching delay of CMOS gates depends on V → V(fcpu) (Un-)Safe Operating Area

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Undervolting Basics - DVS

ICs are mostly based on CMOS technology

Static power dissipation is negligible Overall power consumption is dominated by pdyn = CL · fcpu · V 2 But the switching delay of CMOS gates depends on V → V(fcpu) (Un-)Safe Operating Area

DVS: Adapting fcpu to current Workload and scale V(fcpu)

voltage voltage 100% 0% 100% 0%

Task 1 Task 2

T T

Task 1 Task 2

T T

DPM DVS

f cpu=8MHz f cpu=8MHz f cpu=4MHz f cpu=6MHz

March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 4

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Undervolting Basics - DVS

ICs are mostly based on CMOS technology

Static power dissipation is negligible Overall power consumption is dominated by pdyn = CL · fcpu · V 2 But the switching delay of CMOS gates depends on V → V(fcpu) (Un-)Safe Operating Area

Undervolting: Violate specifications V(fcpu)

→

V(fcpu) − ∆V

voltage voltage 100% 0% 100% 0%

Task 1 Task 2

T T

Task 2

T T

Undervolting

f cpu=8MHz f cpu=8MHz f cpu=4MHz f cpu=6MHz

Task 1 Task 2 Task 1 Task 2

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Undervolting – Basics

Temperature Dependency

Specification of V(fcpu) is given in Datasheets Specification does not include the temperature V(fcpu, T)

Threshold Voltage Vth of CMOS is temperature dependent Vth(T) = Vth0 + α · (T − T0)

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Undervolting – Basics

Temperature Dependency

Specification of V(fcpu) is given in Datasheets Specification does not include the temperature V(fcpu, T)

Threshold Voltage Vth of CMOS is temperature dependent Vth(T) = Vth0 + α · (T − T0)

MCUs cover a widespread temperature range with a fixed voltage level V(fcpu)

→ MCUs must be able to run below V(fcpu) (under normal conditions)

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Challenges and Issues

Undervolting will lead to a higher unreliability: Operating devices outside their specification Calculation errors, losses, resets, failures may affect the application

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Challenges and Issues

Undervolting will lead to a higher unreliability: Operating devices outside their specification Calculation errors, losses, resets, failures may affect the application Our Perspective: WSNs are designed to be fault tolerant per se (protocols, algorithms, applications, ...) WSNs need increased energy efficiency and offer fault tolerance (ideal)

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Theory and Practice

Preparations: Ordering of ATmega1284p MCUs from different distributors Implementation of a prototype to analyze the effect of Undervolting

Transceiver 802.15.4 AT86RF231 Transceiver 802.15.4 AT86RF231 I/O SPI UART0 PCB Antenna PCB Antenna JTAG Header JTAG Header

ext. Voltage

Supply

MCU

ATmega1284p

MCU

ATmega1284p UART / USB FTDI232 UART / USB FTDI232

V ext

V core

Co-Processor ATtiny84 Co-Processor ATtiny84 I2C Bus I2C Voltage Scaling Module I2C Voltage Scaling Module core Voltage March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 7

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Detecting failures caused by Undervolting

Continuous (periodic) observation (counter-check) of...

Busses (I2C, SPI) GPIOs Clock rate ALU failures (calculation errors)

1A. Rohani and H.-R. Zarandi, ”An analysis of fault effects and propagations in avr microcontroller atmega103(l),”

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Detecting failures caused by Undervolting

Continuous (periodic) observation (counter-check) of...

Busses (I2C, SPI) GPIOs Clock rate ALU failures (calculation errors)

How to detect ALU failures by software?

A complete test is not adequate ((2n)m)

Sufficient error detection through checksum calculation1 checksum = det(A · B) with A, B ∈ Rn×n

1A. Rohani and H.-R. Zarandi, ”An analysis of fault effects and propagations in avr microcontroller atmega103(l),”

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Testbench Implementation

GPIO Test Interface Test ALU Test Test Scores (Checksum)

Test OK / FAIL Test OK / FAIL PWR Dissipation PWR Dissipation Clock Rate Clock Rate

MCU AtMega1284p MCU AtMega1284p MCU AtTiny84 MCU AtTiny84 Voltage Scaling Module Voltage Scaling Module I2C Bridge I2C Bridge

Undervolted MCU 2nd reliable MCU

(Secure Instance)

I2C-Bus

Clock Rate Feedback Periodic Test Cycle

Periodic Test Cycle (1Hz):

Execute tests on undervolted MCU and use reliable MCU for validation Measure time between test cycles and generate binary feedback for clock rate adjustment

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Clock Rate Recalibration

fcpu [MHz] 3.4 3.5 3.6 3.7 3.8 3.9 4 4.1 3.4 3.5 3.6 3.7 3.8 3.9 4 4.1 time [s] 10 20 30 40 50 10 20 30 40 50

1520 1570 1620 1670 1720 1770

V = 1,52V ≙ ∆V = 0,28V V = 1,57V ≙ ∆V = 0,23V V = 1,62V ≙ ∆V = 0,18V V = 1,67V ≙ ∆V = 0,13V V = 1,72V ≙ ∆V = 0,08V V = 1,77V ≙ ∆V = 0,03V

Linear recalibration of the clock rate (binary feedback) Constant clock rate despite using undervolting

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Functionality analysis 1/2

Evaluation of three MCUs from different distributors:

probability of failures [%] 20 40 60 80 100 20 40 60 80 100 deviation from the nominal voltage V(fcpu) [%] 5 10 15 20 25 5 10 15 20 25 fcpu = 4MHz fcpu = 5MHz fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz probability of failures [%] 20 40 60 80 100 20 40 60 80 100 deviation from the nominal voltage V(fcpu) [%] 5 10 15 20 25 5 10 15 20 25 fcpu = 4MHz fcpu = 5MHz fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz probability of failures [%] 20 40 60 80 100 20 40 60 80 100 deviation from the nominal voltage V(fcpu) [%] 5 10 15 20 25 5 10 15 20 25 30 fcpu = 4MHz fcpu = 5MHz fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Functionality analysis 1/2

Evaluation of three MCUs from different distributors:

probability of failures [%] 20 40 60 80 100 20 40 60 80 100 deviation from the nominal voltage V(fcpu) [%] 5 10 15 20 25 5 10 15 20 25 fcpu = 4MHz fcpu = 5MHz fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz probability of failures [%] 20 40 60 80 100 20 40 60 80 100 deviation from the nominal voltage V(fcpu) [%] 5 10 15 20 25 5 10 15 20 25 fcpu = 4MHz fcpu = 5MHz fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz probability of failures [%] 20 40 60 80 100 20 40 60 80 100 deviation from the nominal voltage V(fcpu) [%] 5 10 15 20 25 5 10 15 20 25 30 fcpu = 4MHz fcpu = 5MHz fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz

→ Similar but individual results even with same kind of MCU!

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Functionality analysis 2/2

Exemplary Results of MCU2:

probability of failures [%] 20 40 60 80 100 20 40 60 80 100 deviation from the nominal voltage V(fcpu) [%] 5 10 15 20 25 5 10 15 20 25 fcpu = 4MHz fcpu = 5MHz fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz

Statements:

Undervolting is possible Malfunction appears in a small, sharp region Individual characteristic (even for same kind of MCUs) Possible deviation growth with clock rate

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Energy Savings

Averaged energy per clock cycle:

energy per clock cycle [nJ] 0.4 0.5 0.6 0.7 0.8 0.4 0.5 0.6 0.7 0.8 deviation from the nominal voltage V(fcpu) [%] 5 10 15 20 25 5 10 15 20 25

instruction-100 instruction-80 instruction-100 instruction-80 instruction-100 instruction-80 instruction-100 instruction-80 instruction-100 instruction-80

fcpu = 4MHz fcpu = 5MHz fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Energy Savings

Averaged energy per clock cycle:

energy per clock cycle [nJ] 0.4 0.5 0.6 0.7 0.8 0.4 0.5 0.6 0.7 0.8 deviation from the nominal voltage V(fcpu) [%] 5 10 15 20 25 5 10 15 20 25

instruction-100 instruction-80 instruction-100 instruction-80 instruction-100 instruction-80 instruction-100 instruction-80 instruction-100 instruction-80

fcpu = 4MHz fcpu = 5MHz fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz

Compared to recommended voltage level V(fcpu):

fcpu[MHz] 4 5 6 7 8 Emin[pJ] 404.0 420.2 437.0 466.8 475.0 max(δe)[%] 33.52 35.96 36.67 38.23 42.66

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Temperature Dependency

Presumption: Threshold voltage depends on temperature Measurement of the minimum (stable) operating point in a climatic chamber

ATmega1284p MCU @ fcpu = 4MHz → recommended V(fcpu) = 1.8V

Absolute Voltage Level [V] 1.4 1.45 1.5 1.55 1.6 1.65 1.4 1.45 1.5 1.55 1.6 1.65 Temperature [C°] −40 −20 20 40 60 80 100 −40 −20 20 40 60 80 100

2 LinearFit1

fcpu = 6MHz fcpu = 7MHz fcpu = 8MHz 2 LinearFit1 Operating Point (Measured) Line-Fit

Nodes are exposed to various environmental conditions

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Wireless Communication

Undervolting and transceiver unit: Not mainly based on CMOS (RF-section, amplifiers, ...) How to detect errors?

Increased packet loss indicates communication errors

probability of communication failures [%] 20 40 60 80 100 20 40 60 80 100 transceiver voltage Vrtx[mV] 1,550 1,555 1,795 1,800 1,550 1,555 1,795 1,800

2

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Wireless Communication

Undervolting and transceiver unit: Not mainly based on CMOS (RF-section, amplifiers, ...) How to detect errors?

Increased packet loss indicates communication errors

AT86RF231 IEEE 802.15.4 Transceiver, nominal minimal voltage level 1.8V, Contiki + RIME-Stack

probability of communication failures [%] 20 40 60 80 100 20 40 60 80 100 transceiver voltage Vrtx[mV] 1,550 1,555 1,795 1,800 1,550 1,555 1,795 1,800

2

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Wireless Communication

The transceiver has a fixed transmit and reception power

Power dissipation is less bound to the voltage level Nevertheless:

gain [%] 2 4 6 8 2 4 6 8 Transceiver voltage [mV] 1,600 1,650 1,700 1,750 1,800 1,600 1,650 1,700 1,750 1,800 gain of current consumtion minimum recommended voltage level March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 16

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Results – Wireless Communication

The transceiver has a fixed transmit and reception power

Power dissipation is less bound to the voltage level Nevertheless:

gain [%] 2 4 6 8 2 4 6 8 Transceiver voltage [mV] 1,600 1,650 1,700 1,750 1,800 1,600 1,650 1,700 1,750 1,800 gain of current consumtion minimum recommended voltage level

Only few experiences: Undervolting of other parts (e.g. transceiver) is possible

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Summary

Legitimation for undervolting in WSNs: Using safety margin of CMOS parts

Temperature dependencies Individual tolerances

WSNs are fault tolerant

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Summary

Legitimation for undervolting in WSNs: Using safety margin of CMOS parts

Temperature dependencies Individual tolerances

WSNs are fault tolerant Prototype implementation and evaluation of COTS MCUs: Undervolting of MCUs is possible May influence parts of the MCU (e.g. RC-oscillator) Energy savings up to 42%

March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 17

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Summary

Legitimation for undervolting in WSNs: Using safety margin of CMOS parts

Temperature dependencies Individual tolerances

WSNs are fault tolerant Prototype implementation and evaluation of COTS MCUs: Undervolting of MCUs is possible May influence parts of the MCU (e.g. RC-oscillator) Energy savings up to 42% Usage of experimental results on higher layers: Undervolting adds heterogeneity

New approaches for load balancing, routing, ...

March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 17

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Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion

Summary

Legitimation for undervolting in WSNs: Using safety margin of CMOS parts

Temperature dependencies Individual tolerances

WSNs are fault tolerant Prototype implementation and evaluation of COTS MCUs: Undervolting of MCUs is possible May influence parts of the MCU (e.g. RC-oscillator) Energy savings up to 42% Usage of experimental results on higher layers: Undervolting adds heterogeneity

New approaches for load balancing, routing, ...

Thank you for your attention! Questions? Ulf Kulau

kulau@ibr.cs.tu-bs.de

March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 17