threads gc in clozure cl
play

Threads & GC in Clozure CL R. Matthew Emerson rme@clozure.com - PowerPoint PPT Presentation

Threads & GC in Clozure CL R. Matthew Emerson rme@clozure.com Clozure Associates Threads Threads in CCL are scheduled by the operating system (so they can run concurrently on multiple processors). A thread can get preempted at any


  1. Threads & GC in Clozure CL R. Matthew Emerson rme@clozure.com Clozure Associates

  2. Threads • Threads in CCL are scheduled by the operating system (so they can run concurrently on multiple processors). • A thread can get preempted at any instruction boundary; this implies that a GC may happen at any instruction boundary. • WITHOUT-INTERRUPTS doesn’t affect scheduling.

  3. Clozure CL GC • The GC is precise: it always knows whether a root (register or stack location) contains a lisp object or just raw bits. • Strict register (and stack) usage conventions enable this. • Registers and stacks must be in a GC- consistent state at every instruction boundary (except for few special cases).

  4. Register Conventions PowerPC rzero fn • Some registers always contain sp temp3 target-1 temp2 “immediates” imm0 temp1 imm1 temp0 • Others always contain “nodes” imm2 arg_x • Immediates must never end up in imm3 arg_y imm4 arg_z imm5 save7 node registers (and vice versa), not allocptr save6 even for a single instruction. allocbase save5 nargs save4 tsp save3 target-2 save2 loc-pc save1 vsp save0

  5. Register usage conventions work best when there are registers to work with... PowerPC x86-64 x86-32 rzero fn imm0 imm0 sp temp3 imm2 temp0 target-1 temp2 imm1 temp1 imm0 temp1 temp0 arg_z imm1 temp0 rsp esp imm2 arg_x rbp ebp imm3 arg_y arg_z arg_y imm4 arg_z arg_y fn imm5 save7 arg_x allocptr save6 temp1 allocbase save5 temp2 nargs save4 save3 tsp save3 save2 target-2 save2 fn loc-pc save1 save1 vsp save0 save0

  6. x86-32 hackery x86-32 • A bit mask in thread-private eax imm0 memory indicates whether each ecx temp0 edx temp1 register is a node or an immediate. ebx arg_z esp • We also use the x86 direction flag: if ebp esi arg_y set, EDX is an immediate, otherwise edi fn it’s a node.

  7. Sample code... (defx8632lapfunction %atomic-incf-ptr ((ptr arg_z)) (mark-as-imm temp0) (mark-as-imm temp1) (let ((imm1 temp0) (imm2 temp1)) (macptr-ptr ptr imm2) @again (movl (@ (% imm2)) (% eax)) (lea (@ 1 (% eax)) (% imm1)) (lock) (cmpxchgl (% imm1) (@ (% imm2))) (jne @again) (box-fixnum imm1 arg_z)) (mark-as-node temp0) (mark-as-node temp1) (single-value-return))

  8. So, who cares? • People hacking the runtime and the compiler back end • LAP programmers • The Lisp programmer is not affected by any of these issues.

Download Presentation
Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend


More recommend