The sampling theorem in and digital dividers Claudio E. Calosso - PowerPoint PPT Presentation

In memoriam of Jacques Groslambert The sampling theorem in Π and Λ digital dividers Claudio E. Calosso ∇ and Enrico Rubiola ∃ ∇ INRIM, Torino, Italy ∃ CNRS FEMTO-ST Institute, Besancon, France Outline • Theoretical introduction • Π and Λ digital dividers • Experiments home page http://rubiola.org

2 Motivations • Seminal article by W. F . Egan (1990) • Milestone in the domain, never forget it • However, TTL and ECL logic families are now obsolete • Microwave (photonics) –> highest spectral purity • Transfer the spectral purity to HF/VHF • Dividers are more comfortable than multipliers • NIST now uses analog dividers • Nowadays digital electronics is fantastic • CPLD & FPGA –> Easy to duplicate • High number of gates for cheap • High toggling frequency (1.5 GHz) W. F . Egan Egan WF , Modeling phase noise in frequency dividers, IEEE T UFFC 37(4), July 1990 E. Rubiola & al, Phase noise in the regenerative frequency dividers, IEEE T IM 41(3), June 1992 A. Hati & al, Ultra-low-noise regenerative frequency divider…, Proc IEEE IFCS, May 2012

3 The gearwork model phase ϕ o = 1 D ϕ i • The noise-free divider jitter x o = x i phase ϕ i ν o • Keeps the input jitter x( t ) ν i (phase-time fluctuation) ν o = 1 • Scales down D ν i • φ by 1/ D [rad] N teeth ND teeth • S φ by 1/ D 2 [rad 2 /Hz] S 힅 ( f ) input • In the real divider 1 / D 2 • S φ of the output stage adds up actual (output stage) and often dominates 1 / D 2 1 / D 2 gearbox f W. F . Egan Egan WF , Modeling phase noise in frequency dividers, IEEE T UFFC 37(4), July 1990

4 Sampling and aliasing — Energy conservation applies to the unfiltered signal — II Input signal S x (ƒ) (unfiltered wide-band noise) • Multiple aliases overlap to the main etc. etc. part of the spectrum main ƒ f s 2 f s 3 f s − 3 f s − 2 f s − f s alias a l i alias a alias s a • With white noise, the l i a s s a i l a PSD increases by B /ƒ N Reconstructed signal (Bandwidth / Nyquist ƒ) (aliased) ƒ f N = 1 2 f s Nyquist frequency Downsampling increases the (PM) noise spectrum High ƒ N Low ƒ N N = σ 2 /f N N = σ 2 /f N S x (ƒ) S x (ƒ) I I ƒ ƒ f N f N

5 Aliasing and 1/ƒ noise II S x (ƒ) Proportionally lower power in the higher-ƒ aliases Input signal (unfiltered wide-band 1/f noise) etc. etc. ƒ f s 2 f s 3 f s − 3 f s − 2 f s − f s main alias s a i l a alias alias alias Small e ff ect on the alias overall noise spectrum Reconstructed signal (little aliasing effect) ƒ f N = 1 2 f s Nyquist frequency

6 PM-noise aliasing in the input stage saturated in out t analog gain Convert the input sinusoid into a square wave, as appropriate t equivalent sampling function • Edge-sampling at 2 ν i inherent in the sin-to-square conversion • Full-bandwidth ( B ) noise is taken in • The phase-noise Nyquist frequency is ν i • The sampling process increases the noise by B / ν i Eventually, clipping removes the AM noise [Pfa ff 1974]

7 Aliasing in Π divider Regular synchronous divider The Greek letter Π recalls the square wave Π Π Π Π input sampling frequency 2 ν i input t jitter is discarded jitter is discarded jitter is discarded ÷ 10 jitter is jitter is jitter is jitter is transmitted transmitted transmitted transmitted out t output sampling frequency ν o = 2 1 D ν i squarewave • The gearbox scales S φ down by 1/ D 2 clock sin 1 / D input aliasing • The divider takes 1 edge out of D White S 힅 ( f ) = b 0 Π divider • Raw decimation without low-pass filter 1 / D 2 • Aliasing increases S φ by D • Overall, S φ scales down by 1/ D Λ divider

8 The Λ divider – Little/no aliasing New divider architecture Series of Greek letters ΛΛΛΛΛ recalls the triangular wave • Gearbox and aliasing –> 1/ D law ÷ 10 D shift register • Add D independent realizations in out shifted by 1/2 input clock, • reduce the phase noise by 1/ D , shift register • … and get back the 1/ D 2 law ÷ 10 D squarewave input clock sin 1 / D input aliasing White S 힅 ( f ) = b 0 Π divider output 1 / D 2 Λ divider The names Π and Λ derive from the shape of the weight functions in our article on frequency counters E. Rubiola, On the measurement of frequency … with high-resolution counters, RSI 76 054703, 2005

9 Experimental method Large input PM noise is used to emphasize the e ff ect of aliasing • Intentionally high PM noise at the input • The scaled-down input noise is higher than the output-stage noise ! • Large attenuation/ampli –> noise S 힅 ( f ) input • Digital instruments for phase-noise 1 / D 2 measurement can handle 1 / D 2 ƒ input ≠ ƒ reference gearbox output stage • Correlation reduces the background f

10 Dividers under test EPM3064A CPLD (Altera MAX 3000 Series, 64 macro-cells, speed grade 7 ns) out in Π divider ÷ 10 – the one everybody knows – Multi-bu ff er Π divider Λ divider ÷ 10 D shift register ÷ 10 in out D-type register in out shift register ÷ 10 D White noise: The outputs are arguably independent The clock edges are independent Try to reduce the output-stage noise Correct for aliasing

11 Results – Test on aliasing Λ and dividers (multi-buf Π config) 0 . 5 d B d i s c r e p a n c y –20 dB internal clock +4 dB sin input Π divider –9.3 dB output (theory –10) Λ divider –18.7 dB output (theory –20) • Flicker region • White region • Negligible aliasing • Aliasing in the front-end –> +4 dB • 1/ D 2 law (–20 dB) • 1/ D law and 1/ D 2 law

12 Phase noise of real dividers Multibu ff er Π divider ÷ 10 Λ and Π dividers b –1 = –120 dB (multibuffer Π config) D-type register in out i n –116.5 dB a s multiple outputs are v u e ffi b –1 = –130.5 dB r expected to reduce the a c –128.5 dB g i e output-stage noise i n n g t – not happened, why? – ? artifacts? b –1 ≈ –156 dB b 0 ≈ –165 dB experimental problems still present • Flicker region –> Negligible aliasing • The multibu ff er Π divider is still not well explained • The Λ divider exhibits low 1/ƒ and low white noise

13 Allan deviation of real dividers • Slope 1/ τ , typical of white and flicker PM noise • The Λ divider performs 2 × 10 –14 at τ = 1 s, 10 MHz output

14 The bottom line • Aliasing in traditional dividers • Increases white noise • Has little e ff ect on flicker • Flicker in multi-bu ff er Π divider not understood yet • The new Λ divider • Is little/no a ff ected by aliasing • Exhibits the lowest PM noise flicker: b –1 ≈ –130 dB white: b 0 ≈ –165 dB • Features 2 × 10 –14 at τ = 1 s, 10 MHz output home page http://rubiola.org Thanks – J. Groslambert, V. Giordano, M. Siccardi, J.-M. Friedt Grants from ANR (Oscillator IMP and First-TF network), and Region Franche Comte