Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras
*Currently a Visiting Professor at IIT Bombay
Digital Circuits and Systems
Spring 2015 Week 9 Additional Module
IEEE 754 Format
Systems IEEE 754 Format Shankar Balachandran* Associate Professor, - - PowerPoint PPT Presentation
Spring 2015 Week 9 Additional Module Digital Circuits and Systems IEEE 754 Format Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras *Currently a Visiting Professor at IIT Bombay There is no
Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras
*Currently a Visiting Professor at IIT Bombay
IEEE 754 Format
There is no video corresponding to this file.
2
Arithmetic Circuits 3
Sign bit: S is the sign of the floating point number Exponent: p-bit exponent (E) in excess-B code. Mantissa: m-bit unsigned mantissa (M). Radix: R is the radix for the representation. Actual value of the number represented above is: F = (-1)S × 1.M × RE-B … (if normalized) F = (-1)S × M × RE-B … (if unnormalized)
S Exponent (E) Mantissa (M)
1 p bits m bits
Arithmetic Circuits 4
Single Precision Format: (32 bits)
F = (-1)S × 1. M × 2E-127 Special reserved values:
E = 0 with M = 0 represents ZERO E = 255 with M = 0 represents ± E = 255 with M ≠ 0 represents NaN
Double Precision Format: (64 bits)
F = (-1)S × 1. M × 2E-1023
1 8 bits 23 bits 22 23 30 31
S Exponent (E) unsigned Mantissa (M)
1 11 bits 52 bits
Arithmetic Circuits 5
Convert 4.62×102 to IEEE single precision format:
4.62×102 = 462 = 111001110.0 = 1.110011100 × 28 Mantissa = 110011100 Exponent = 8+127 = 135 = 10000111 0 1000 0111 1100 1110 0000 0000 0000 000 = 0 87 CE0000
Convert -0.456×2-3 to IEEE single precision format:
Exponent = -5+127 = 122 = 01111010 1 0111 1010 1101 0010 1111 0001 1010 101 = 1 7A D2F1AA
Convert 1 81 99999A to decimal representation:
Mantissa = -1.1001 1001 1001 1001 1001 1010 Exponent = 8116 - 12710 = -1.1001 1001 1001 1001 1001 1010 × 22 = -0110.0110 0110 0110 0110 0110 1 = -6.4
Arithmetic Circuits 6
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Arithmetic Circuits 7
Add (11000000, 011) to (10101100, 100) (input numbers are in the
That is, (1.11000000 × 2011-100) + (1.10101100 × 2100-100) = ? Since (100 > 011), M1 = 1.10101100 E1 = 100 and M2 = 1.11000000 E2 =
011
d = E1 – E2 = 100 – 011 = 001 Right-shift M2 by 001 (1) bits M2 = 0.11100000 E2 = 100 MSUM = 1.10101100 + 0.11100000 = 10.10001100 and ESUM= E1 =
100
Post-normalize: MSUM = 1.01000110 and ESUM= 101 Therefore,
(1.11000000 × 2011-100) + (1.10101100 × 2100-100) = (1.01000110 × 2101-100)
Or,
(11000000, 011) + (10101100, 100) = (01000110, 101)
Arithmetic Circuits 8
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Arithmetic Circuits 9
Multiply (10101100, 0101) and (11000000, 0110) (input
That is, (1.10101100 × 20101-1000) × (1.11000000 × 20110-1000) = ? MPROD = 1.10101100 × 1.11000000 = 10.1110110100000000 and
Post-normalize: MPROD = 1.01110110100000000 and
Rounding : MPROD = 1.01110111 Therefore,
(1.11000000 × 20101-1000) × (1.10101100 × 20110-1000) = (1.01110111 × 20100-1000)
Or,
Multipliers+Others 10