Syntroids Synthesizing a Game for FPGAs using Temporal Logic Specifications Gideon Geier, Philippe Heim , Felix Klein and Bernd Finkbeiner 24th October 2019 Saarland University OSARES
Reactive Synthesis What requirements temporal specification ϕ should the system meet? Reactive Push the button! Synthesis realizable + Get a correct system unrealizable Model M , with M � ϕ 2 Syntroids, Philippe Heim, Gideon Geier
Reactive Synthesis In theory Synthesized systems are “correct” by design and therefore nice. In practice Milestone: Synthesis of AMBA AHB (R. Bloem, B. Jobstmann, S. Galler, N. Piterman, Y. Godhal, K. Chatterjee, T. A. Henzinger . . . ) But still not much used. = ⇒ Synthesis is not suited for real world applications? 3 Syntroids, Philippe Heim, Gideon Geier
In our case study we present Syntroids a game for FPGAs synthesized with Temporal Stream Logic (TSL) as specification language 4 Syntroids, Philippe Heim, Gideon Geier
radar mode cockpit mode score mode 5 Syntroids, Philippe Heim, Gideon Geier
Architecture 32 × 32 LED matrix FPGA Sensor IO Game logic LED matrix Output Accelerometer + Gyroscope 6 Syntroids, Philippe Heim, Gideon Geier
Specification language – LTL? LTL : ϕ := a | ϕ ∧ ϕ | ¬ ϕ | ϕ | ϕ U ϕ | ϕ | ϕ | ϕ R ϕ | · · · where a ∈ AP But we have to . . . • manage 16-bit Sensor values using SPI • integrate these to get absolute positions • control a 1024-pixel LED-matrix • work with Cartesian- and Polar-coordinates = ⇒ LTL is not suited for the Syntroids game 7 Syntroids, Philippe Heim, Gideon Geier
Specification language - Temporal Stream Logic (TSL) “Everytime the sensor input is greater than 100, we want to increase our score by one.” � ”100 < ” sensor → � score ”1 + ” score � � • sensor , score are data streams • ”100 < ” is a predicate literal • ”1 + ” is a function literal • Important: The synthesis tool does not know the implementation (which may be defined after the synthesis). • � score ”1 + ” score � is an update 8 Syntroids, Philippe Heim, Gideon Geier
Specification language - Temporal Stream Logic (TSL) � ”100 < ” sensor → � score ”1 + ” score � � score sensor 8 Syntroids, Philippe Heim, Gideon Geier
Specification language - Temporal Stream Logic (TSL) TSL ∋ ϕ, ψ ::= ⊤ | ϕ ∧ ψ | ¬ ϕ | ϕ | ϕ U ψ | � s 0 τ f � | τ p • TSL works with arbitrary data streams • TSL specifies the control structure • Data manipulations and predicates are given manually, but implementation is not needed for the synthesis cells: C reactive system . . . . . . implementing a inputs: outputs: . . . . . TSL specification ϕ . I O B. Finkbeiner, F. Klein, R. Piskac, and M. Santolucito, “Temporal stream logic: Synthesis beyond the bools,” in Computer Aided Verification - 31th International Conference, CAV 2019, New York, NY, USA, July 15-18, 2019, 9 Proceedings, Part I, 2019. Available: https://doi.org/10.1007/978-3-030-25540-4_3
Architecture SPI Read SPI Write byte address SensorRegister (REG G Y) GameModeChooser gyroy gamemode address SDI SDI actcolor ScoreBoard bxcoord scoreboardpoint SPI Read SPI Write SensorRegister (REG G X) bycoord CLK CLK gyrox counter RotationCalculator counter score gameover gyroz SensorRegister (REG G Z) scorecolor SPI Read sdi sdi SPI Write gameover sdo spc spc ActionConverter GameLogic Manager Manager gamestart SensorRegister (REG A X) enemies accz shot cs cs rotation moveticks resets readControl readSpiPins writeSpiPins writeControl regData regType readResponse writeResponse SPI spiPins RegManager clock reset resetangle clock reset resetangle clock reset resetangle clock reset resetangle Sensor EnemyModule EnemyModule EnemyModule EnemyModule initFinished regManagerCmd Sensor startInit regManagerCmdInit Init sensorInit color color color color angle radius angle radius angle radius angle radius spiControlInit sdiIn csIn spcIn accFinished csAG spiResponse Sensor Sensor startAcc csAlt Part regManagerCmdAcc Selector sdi (ACC) sensorAcc CockpitBoard bxcoord spc spiControlAcc bycoord cockpitboardpoint GameModule gyrFinished color Sensor radarboardpoint startGyr Part regManagerCmdGyr outpoint RadarBoard outx sensorGyr (GYRO) outy InitialBlocker write xcoordinate extclock spiControlGyr color driverPin writecolor ycoordinate coordy Sensor Submodule spiControl LookupTable LookupTable Video color2 rampos ramreqcosine ramreqsine LedMatrix Chooser color1 sensorType (cosine) (sine) Memory ramwrite ramcosineout ramsineout bufferPin ramout Game LED matrix Sensor IO logic Output 10 Syntroids, Philippe Heim, Gideon Geier
Architecture SPI Read SPI Write byte address SensorRegister (REG G Y) GameModeChooser gyroy gamemode address SDI SDI actcolor ScoreBoard bxcoord scoreboardpoint SPI Read SPI Write SensorRegister (REG G X) bycoord CLK CLK gyrox counter counter RotationCalculator score gameover gyroz SensorRegister (REG G Z) scorecolor SPI Read sdi sdi SPI Write GameLogic gameover sdo spc spc ActionConverter Manager Manager gamestart SensorRegister (REG A X) enemies accz shot cs cs rotation moveticks resets readControl readSpiPins writeSpiPins writeControl regData regType readResponse writeResponse SPI spiPins Sensor RegManager clock reset resetangle clock reset resetangle clock reset resetangle clock reset resetangle EnemyModule EnemyModule EnemyModule EnemyModule initFinished regManagerCmd Sensor startInit regManagerCmdInit Init sensorInit color color color color angle radius angle radius angle radius angle radius spiControlInit sdiIn csIn spcIn Sensor accFinished csAG spiResponse Sensor startAcc csAlt Part regManagerCmdAcc sdi Selector (ACC) sensorAcc CockpitBoard bxcoord spc spiControlAcc bycoord cockpitboardpoint GameModule gyrFinished color Sensor radarboardpoint startGyr Part regManagerCmdGyr outx outpoint RadarBoard (GYRO) sensorGyr outy InitialBlocker write xcoordinate extclock spiControlGyr color writecolor ycoordinate driverPin coordy Sensor Submodule spiControl LookupTable LookupTable Video color2 rampos ramreqcosine ramreqsine LedMatrix Chooser color1 sensorType (cosine) (sine) Memory ramwrite ramcosineout ramsineout bufferPin ramout Latches Synthesized Provided 10 Syntroids, Philippe Heim, Gideon Geier
Invariants ( � out scoreboardpoint � ∨ � out radarboardpoint � ∨ � out cockpitboardpoint � ) ∧ ( gameover → � out scoreboardpoint � ) ∧ ( ¬ gameover → (isScoreMode gamemode → � out scoreboardpoint � ) ∧ (isRadarMode gamemode → � out radarboardpoint � ) ∧ (isCockpitMode gamemode → � out cockpitboardpoint � )) cockpitboardpoint GameModule radarboardpoint outpoint 11 Syntroids, Philippe Heim, Gideon Geier
Partial Orders (( � color 1 ramout � ) → � rampos ”rampos 1 ” coord x (”1 + ” coord y ) � ) ∧ ( � extclock low () � → � � color 1 ramout � R ¬ � extclock high () � � ) outpoint InitialBlocker write extclock xcoordinate driverPin writecolor ycoordinate coordy able Video color2 rampos LedMatrix color1 ramwrite Memory bufferPin ramout 12 Syntroids, Philippe Heim, Gideon Geier
Scheduling � extclock low () � ∧ ( � extclock high () � ) ∧ ( � extclock low () � ) outpoint InitialBlocker write extclock xcoordinate driverPin writecolor ycoordinate coordy able Video color2 rampos LedMatrix color1 ramwrite Memory bufferPin ramout 13 Syntroids, Philippe Heim, Gideon Geier
And now both together ( � extclock high () � ) ∧ ( � extclock low () � ) ∧ ( � coord x ”1 + ” coord x � ) ∧ ( � color R ramout � ) ∧ ( (( � color 1 ramout � ) → � rampos ”rampos 1 ” coord x (”1 + ” coord y ) � )) ∧ ( ( � extclock low () � � � color 1 ramout � R ¬ � extclock high () � � )) → ∧ ( ( � coord x ”1 + ” coord x � � � extclock high () � R ¬ � coord x ”1 + ” coord � � )) → . . . = ⇒ Each property is simple but the resolve complicated 14 Syntroids, Philippe Heim, Gideon Geier
Specification Reuse accFinished Sensor spiResponse startAcc Part regManagerCmdAcc sensorAcc (ACC) spiControlAcc gyrFinished Sensor startGyr Part regManagerCmdGyr sensorGyr (GYRO) spiControlGyr Same specification with different function implementations 15 Syntroids, Philippe Heim, Gideon Geier
Assumptions GameModule Gamemode := { ScoreMode , RadarMode , CockpitMode } ¬ (isScoreMode gamemode ∧ isRadarMode gamemode ) SPIReadManage ¬ (”0 = ” counter ∧ ”18 < ” counter ) LedMatrix waitcounter ∈ B 7 , N < 128 ( � waitcounter ”1 + ” waitcounter � ) → (”0 � = ” waitcounter ) 16 Syntroids, Philippe Heim, Gideon Geier
Synthesis Toolchain maybe unrealizable ✗ TSL Synthesis LTL Synthesis Tool ✓ LTL Controller CFM FRP ( C λ aSH ) Design Pattern TSL Tools FRP Library ( C λ aSH ) Project Context C λ aSH Functions and Compiler Verilog Predicates 17 Syntroids, Philippe Heim, Gideon Geier
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