SLIDE 1 Switch Codes for Computer Networks
Hui Zhang
Joint work with Yeow Meng Chee, Fei Gao and Samuel Tien Ho Teo
Institute of Computer Science University of Tartu
SLIDE 2 Network Switches1
1Image from http://www.cisco.com/c/en/us/support/docs/
lan-switching/spanning-tree-protocol/5234-5.html
SLIDE 3 Switch Memory Subsystem
Write Controller Read Controller Input Ports Output Ports Memory Banks
SLIDE 4 Data Flow
Write Controller Read Controller C A D B C A D B A B Input Ports: 2 Output Ports: 2 Memory Banks: 2
SLIDE 5 Data Flow with Conflict
Write Controller Read Controller C A D B C A D B A C Input Ports: 2 Output Ports: 2 Memory Banks: 2
SLIDE 6 Solution by Replication
Write Controller Read Controller C A D B C A D B A C Input Ports: 2 Output Ports: 2 Memory Banks: 4 C A D B
SLIDE 7 Solution by Coding2
Write Controller Read Controller C A C+D A+B C A D B A C Input Ports: 2 Output Ports: 2 Memory Banks: 3 D B
- 2Z. Wang, O. Shaked, Y. Cassuto, and J. Bruck, “Codes for network
switches,” in ISIT 2013, pp. 1057–1061.
SLIDE 8 Problem Formulation
◮ Rin: number of input ports ◮ n: number of memory banks ◮ Rout: number of output ports ◮ Redundancy: n − Rin ◮ Generation: data packets written in the same time slot ◮ Σ
SLIDE 9
Problem Formulation: Encoding
f : {ΣRin}i≥0 − → {Σn}i≥0 (1) {Ui}i≥0 − → {Xi}i≥0, where Ui = (ui,0, ui,1, . . . , ui,Rin−1) and Xi = (xi,0, xi,1, . . . , xi,n−1) are input and written bits of one generation, with the subscript i indexing generations. Usually, we use f : ΣRin − → Σn U − → X,
SLIDE 10
Problem Formulation: Requests
Let (ui0,l0, ui1,l1, . . . , uiRout−1,lRout−1) be arbitrary Rout request bits from previous generations. We call the multiset L as request vector: L = (l0, l1, . . . , lRout−1). If the request bits are from t ≤ Rout different generations, we denote the elements in the i-th generation by Li, 0 ≤ i ≤ t − 1, and call them the request sets.
SLIDE 11 Problem Formulation: Decoding
A solution to a request of Rout bits is a way to recover these bits by retrieving no more than one bit from each memory bank. The solution to a request from t generations consists of
◮ a partition P = {P0, P1, . . . , Pt−1} of [0, n − 1], ◮ a bijection φ from {Li : i ∈ [0, t − 1]} to P:
φ : Li − → φ(Li) ∈ P (2)
◮ and t decoding functions gi, 0 ≤ i ≤ t − 1, such that the
request bits are correctly recovered, that is, gi : {xj : j ∈ φ(Li)} − → {uk : k ∈ Li}. (3)
SLIDE 12 Problem Formulation: Definitions
Definition
◮ A t-consecutive-generation switch code, or more precisely
an (n, Rin, Rout; t) switch code, is a pair of encoding and decoding functions that satisfies the conditions (1)–(3).
SLIDE 13 Recall: Solution by Replication
Write Controller Read Controller C A D B C A D B A C Input Ports: 2 Output Ports: 2 Memory Banks: 4 C A D B
SLIDE 14 Questions
◮ Only through replication: n = RinRout ◮ Code redundancy: reduce n given Rin and Rout. ◮ Systematic codes: the input packets are stored directly into
the first Rin of a total of n memory banks, and the rest are parity bits.
SLIDE 15 t-consecutive-generation requests
The t-consecutive-generation switch codes are applicable when the data packets expire after a fixed time slot and only the newest t generations are of interest.
◮ Example:
(u0, u1, u2) → (u0, u1, u2, u0 + u1, u1 + u2) Any 2-consecutive-generation requests of size 3 can be solved.
◮ Graphic view:
u0 u1 u2 u1 + u2 u0 + u1
SLIDE 16 t-consecutive-generation requests
◮ There is an (n, Rin, Rout; t) switch code with redundancy
(Rin − 1)(t − 1), provided: t − 1 ≤ ⌊Rin/2⌋ and t − 1 ≤ Rin − ⌊Rout/t⌋.
- Proof. Decomposition of Hamiltonian paths of KRin.
SLIDE 17 (n, Rin, Rout) switch codes
A solution for requests from Rout generations implies a solution for the same request for less than Rout generations.
An (n, Rin, Rout) switch code: each request are from Rout generations
◮ Wang et al.: An (R + R(R − 1)/2, R, R) switch code solving
any request exists.
◮ Equivalent to batch codes.
SLIDE 18 One-Burst Requests
◮ A one-burst request: only one integer repeats in the request
vector.
◮ Example: R = 5, L = (1, 1, 1, 3, 4)
Write Controller Read Controller #0 #2 #1 #0 #2 #1 Input Ports Output Ports Memory Banks #4 #3 #4 #3
SLIDE 19 Switch Codes for One-Burst Requests
◮ An (n, R, R) switch code solving any one burst request, with
redundancy n − R = R(R − 1)/3.
◮ Wang et al.: R is an odd prime and −3 is a perfect square in
FR.
◮ Our result: R ≡ 0, 1 (mod 6) for R sufficiently large.
SLIDE 20
Some Tech Details
Triple system (X, B): Let X be {0, 1, . . . , R − 1}, and B be a set of triples of X, satisfying (C0) Each pair of X appears in exactly 2 triples; (C1) |Ba ∩ Bb| = 1 for all distinct a, b ∈ X, where Ba = {{x, y} : {a, x, y} ∈ B}; (C2) There do not exist three blocks of the form {a, b, c}, {a, b, d}, {b, c, d} in B.
SLIDE 21
Example: R = 6
X = {0, 1, 2, 3, 4, 5}, B = {{0, 1, 2}, {0, 2, 3}, {0, 1, 4}, {1, 2, 5}, {0, 3, 5}, {2, 3, 4}, {0, 4, 5}, {1, 3, 4}, {1, 3, 5}, {2, 4, 5}}. (u0, u1, . . . , u5) → (u0, u1, · · · , u5, u0 + u1 + u2, u0 + u2 + u3, · · · , u2 + u4 + u5) By using sums of triples in B as parity check-bits, we have an (R + R(R − 1)/3, R, R) switch code for any one-burst request.
SLIDE 22 Conclusion
◮ Using techniques from graph theory and combinatorics, we
give constructions of switch codes for certain parameters.
◮ It is still interesting to give constructions of switch codes with
smaller redundancy.
THE END!
