Software Programming Language Compiler /Interpreter next Operating - PowerPoint PPT Presentation

Program, Application Software Programming Language Compiler /Interpreter next Operating System few weeks Instruction Set Architecture Microarchitecture Hardware Digital Logic Devices (transistors, etc.) Solid-State Physics

CSAPP book is very useful and well-aligned with class for the remainder of the course. C to Machine Code and x86 Basics ISA context and x86 history Translation tools: C --> assembly <--> machine code x86 Basics: Registers Data movement instructions Memory addressing modes Arithmetic instructions 2

Turning C into Machine Code C Code void sumstore(long x, long y, long *dest) { long t = x + y; Generated x86 Assembly Code *dest = t; } Human-readable language close to machine code. sum.c sum: addq %rdi,%rsi movq %rsi,(%rdx) compiler (CS 301) retq sum.s assembler gcc -Og -S sum.c Object Code linker 01010101100010011110010110 00101101000101000011000000 Executable: sum 00110100010100001000100010 01111011000101110111000011 Resolve references between object files, sum.o libraries, (re)locate data 3

Machine Instruction Example C Code *dest = t; Store value t where indicated by dest Assembly movq %rsi, (%rdx) Move 8-byte value to memory "Quad word" in x86-64 speak Operands: t : Register %rsi dest : Register %rdx *dest : Memory M[ %rdx ] Object Code 0x400539: 48 89 32 3-byte instruction encoding Stored at address 0x400539 4

01010101100010011110010110 00101101000101000011000000 Disassembling Object Code 00110100010100001000100010 01111011000101110111000011 ... Disassembled by objdump -d sum 0000000000400536 <sumstore>: Disassembler 400536: 48 01 fe add %rdi,%rsi 400539: 48 89 32 mov %rsi,(%rdx) 40053c: c3 retq Object Disassembled by GDB 0x00400536: 0x0000000000400536 <+0>: add %rdi,%rsi 0x48 0x0000000000400539 <+3>: mov %rsi,(%rdx) 0x01 0x000000000040053c <+6>: retq 0xfe $ gdb sum 0x48 (gdb) disassemble sumstore 0x89 0x32 (disassemble function) 0xc3 (gdb) x/7b sum (examine the 13 bytes starting at sum ) 5

CISC vs. RISC x86 : real ISA, widespread HW : toy, but based on real MIPS ISA HW CISC: maximalism RISC: minimalism Complex Instruction Set Computer Reduced Instruction Set Computer Many instructions, specialized. Few instructions, general. Variable-size encoding, Regular encoding, complex/slow decode. simple/fast decode. Gradual accumulation over time. 1980s+ reaction to bloated ISAs. Original goal: Original goal: • • humans program in assembly humans use high-level languages • • or simple compilers generate smart compilers generate highly assembly by template optimized assembly • • hardware supports many patterns as hardware supports fast basic single instructions instructions • • fewer instructions per SLOC more instructions per SLOC Usually fewer registers. Usually many registers. We will stick to a small subset.

a brief history of x86 Word Size ISA First Year 8086 Intel 8086 1978 16 First 16-bit processor. Basis for IBM PC & DOS 1MB address space 32 IA32 Intel 386 1985 First 32-bit ISA. 2016: most laptops, Flat addressing, improved OS support desktops, servers. 240 now: 64 x86-64 AMD Opteron 2003* Slow AMD/Intel conversion, slow adoption. *Not actually x86-64 until few years later. Mainstream only after ~10 years. 7

ISA View Memory Processor Stack ... Addresses Registers PC Data Heap Condition Instructions Codes Static Data (Global) (String) Literals Instructions 8

x86-64 registers 64-bits wide Return Value Function Argument 5 %rax %r8 Function Argument 6 %rbx %r9 Function Argument 4 %rcx %r10 Function Argument 3 %rdx %r11 Function Argument 2 %rsi %r12 Function Argument 1 %rdi %r13 Special purpose: %rsp %r14 Stack pointer %rbp %r15 Some have special uses for particular instructions 9

x86 historical artifacts Low 32 bits of 64-bit register %rax %eax %r8 %r8d %rbx %ebx %r9 %r9d %rcx %ecx %r10 %r10d %rdx %edx %r11 %r11d %rsi %esi %r12 %r12d %rdi %edi %r13 %r13d %rsp %esp %r14 %r14d %rbp %ebp %r15 %r15d 10

x86 historical artifacts high/low bytes of old 16-bit registers %eax %ax %ah %al accumulate %ecx %cx %ch %cl counter general purpose data %dx %dh %dl %edx %ebx base %bx %bh %bl source %esi %si index destination %edi %di index stack %esp %sp pointer base %ebp %bp pointer Now: low 16 bits… Now: Low 32 bits of 64-bit registers 11

x86: Three Basic Kinds of Instructions 1. Data movement between memory and register Load data from memory into register %reg ß Mem[ address ] Memory is an Store register data into memory array[] of bytes! Mem[ address ] ß %reg 2. Arithmetic/logic on register or memory data c = a + b; z = x << y; i = h & g; 3. Comparisons and Control flow to choose next instruction Unconditional jumps to/from procedures Conditional branches 12

Data movement instructions mov _ Source , Dest data size _ is one of { b, w, l, q } movq Source , Dest : Move 8-byte “quad word” movl Source , Dest : Move 4-byte “long word” movw Source , Dest : Move 2-byte “word” movb Source , Dest : Historical terms based on the 16-bit days, Move 1-byte “byte” not the current machine word size (64 bits) 13

Data movement instructions movq Source , Dest : Operand Types: Immediate: Literal integer data Examples: $0x400 , $-533 Register: One of 16 registers Examples: %rax, %rdx Memory: 8 consecutive bytes in memory, at address held by register Simplest example: (%rax) 14

mov Operand Combinations Source Dest Src,Dest C Analog Reg movq $0x4,%rax a = 0x4; Imm Mem movq $-147,(%rax) *p = -147; Reg movq %rax,%rdx d = a; Reg movq Mem movq %rax,(%rdx) *q = a; Mem Reg movq (%rax),%rdx d = *p; Cannot do memory-memory transfer with a single instruction. How would you do it? 15

Basic Memory Addressing Modes Indirect (R) Mem[Reg[R]] Register R specifies the memory address movq (%rcx),%rax Displacement D(R) Mem[Reg[R]+D] Register R specifies base memory address (e.g. the start of an object) Displacement (offset) D specifies offset from base address (e.g. a field in the object) movq 8(%rsp),%rdx 16

Pointers and Memory Addressing swap: void swap(long* xp, long* yp){ movq (%rdi),%rax long t0 = *xp; movq (%rsi),%rdx long t1 = *yp; movq %rdx,(%rdi) *xp = t1; movq %rax,(%rsi) *yp = t0; retq } Registers Memory Register Variable %rdi ⇔ xp %rdi %rsi ⇔ yp %rsi %rax ⇔ t0 %rax %rdx ⇔ t1 %rdx 17

Complete Memory Addressing Modes General Form: D(Rb,Ri,S) Mem[Reg[ Rb ] + S *Reg[ Ri ] + D ] D: Literal “displacement” value represented in 1, 2, or 4 bytes Rb: Base register: Any register Ri: Index register: Any except %rsp S: Scale: 1, 2, 4, or 8 ( why these numbers? ) Special Cases: Implicitly: (Rb,Ri) Mem[Reg[ Rb ]+Reg[ Ri ]] (S=1,D=0) D(Rb,Ri) Mem[Reg[ Rb ]+Reg[ Ri ]+ D ] (S=1) (Rb,Ri,S) Mem[Reg[ Rb ]+ S *Reg[ Ri ]] (D=0) 18

ex Address Computation Examples Register contents Addressing modes D(Rb,Ri,S) Mem[Reg[ Rb ]+ S *Reg[ Ri ] + D ] %rdx 0xf000 %rcx 0x100 Address Expression Address Computation Address 0x8(%rdx) (%rdx,%rcx) (%rdx,%rcx,4) 0x80(,%rdx,2) 19

"Lovely Efficient Arithmetic" leaq Src , Dest load effective address Src is address mode expression Store address computed in Dest Example: leaq (%rdx,%rcx,4), %rax !!! DOES NOT ACCESS MEMORY Uses p = &x[i]; Arithmetic of the form x + k*i k = 1, 2, 4, or 8 20

leaq vs. movq example Registers Memory Address %rax 0x120 0x400 %rbx 0xf 0x118 0x8 0x110 %rcx 0x4 0x10 0x108 %rdx 0x100 0x1 0x100 %rdi %rsi leaq (%rdx,%rcx,4), %rax movq (%rdx,%rcx,4), %rbx leaq (%rdx), %rdi movq (%rdx), %rsi 21

Memory Layout Addr Perm Contents Managed by Initialized Stack 2 N -1 RW Procedure context Compiler Run-time Programmer, Dynamic Heap RW Run-time malloc/free, data structures new/GC Global variables/ Compiler/ Statics RW Startup static data structures Assembler/Linker Compiler/ Literals R String literals Startup Assembler/Linker Compiler/ Text X Instructions Startup Assembler/Linker 0

Call Stack Stack “Bottom” Memory region for temporary storage managed with stack discipline. higher addresses %rsp holds lowest stack address (address of "top" element) stack grows toward lower addresses Stack Pointer: %rsp Stack “Top” 23

Call Stack: Push Stack “Bottom” pushq Src 1. Fetch value from Src higher 2. Decrement %rsp by 8 (why 8?) addresses 3. Store value at new address given by %rsp stack grows toward lower addresses Stack Pointer: %rsp -8 Stack “Top” 24

Call Stack: Pop Stack “Bottom” popq Dest 1. Load value from address %rsp higher 2. Write value to Dest addresses 3. Increment %rsp by 8 stack grows toward lower addresses Stack Pointer: %rsp Stack “Top” Those bits are still there; we’re just not using them. 25