CSE 506: Opera.ng Systems
Scheduling
Don Porter
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Scheduling Don Porter 1 CSE 506: Opera.ng Systems Logical Diagram - - PowerPoint PPT Presentation
CSE 506: Opera.ng Systems Scheduling Don Porter 1 CSE 506: Opera.ng Systems Logical Diagram Binary Memory Threads Formats Allocators User Todays Lecture System Calls Switching to CPU Kernel scheduling RCU File System Networking
CSE 506: Opera.ng Systems
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– CFS next lecture
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– Processes voluntarily yield CPU when they are done
– OS only lets tasks run for a limited Lme, then forcibly context switches the CPU
– CooperaLve gives more control; so much that one task can hog the CPU forever – PreempLve gives OS more control, more overheads/ complexity
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– Before – During (more next Lme on this) – AXer
– Timer interrupt – ensures maximum Lme slice
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– A task points to 0 or 1 mm_structs
execute in kernel address space
– Many tasks can point to the same mm_struct
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– CPU Lme before a deadline more valuable than Lme aXer
– GUI programs should feel responsive – CPU-bound jobs want long Lmeslices, beeer throughput
– Virus scanning is nice, but I don’t want it slowing things down
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– Some workloads prefer some scheduling strategies
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– Swap out the address space and running thread
– Need to change page tables – Update cr3 register on x86 – Simplified by convenLon that kernel is at same address range in all processes – What would be hard about mapping kernel in different places?
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– Segments, debugging registers, MMX, etc.
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– Tricky: can’t use stack-based storage for this step!
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Thread 1 (prev) Thread 2 (next)
/* eax is next->thread_info.esp */ /* push general-purpose regs*/ push ebp mov esp, eax pop ebp /* pop other regs */
ebp esp eax regs ebp regs ebp
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– Output of switch_to – Wrieen on my stack by previous thread (not me)!
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– pop ebx /* eax sLll points to old task*/ – mov (ebx), eax /* store eax at the locaLon ebx points to */ – pop eax /* Update eax to new task */
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– Pick first one on list to run next – Put suspended task at the end of the list
– Only allows round-robin scheduling – Can’t prioriLze tasks
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– Scan the enLre list on each run – Or periodically reshuffle the list
– Forking – where does child go? – What about if you only use part of your quantum?
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– SLll maintain ability to prioriLze tasks, handle parLally unused quanta, etc
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– Blocked processes are not on any runqueue – A runqueue belongs to a specific CPU – Each task is on exactly one runqueue
– 40 dynamic priority levels (more later) – 2 sets of runqueues – one acLve and one expired
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AcLve Expired 139 138 137 100 101
139 138 137 100 101
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– Confusingly: a lower priority value means higher priority
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AcLve Expired 139 138 137 100 101
139 138 137 100 101
Pick first, highest priority task to run Move to expired queue when quantum expires
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AcLve Expired 139 138 137 100 101
139 138 137 100 101
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– It sLll has part of its quantum leX – Not runnable, so don’t waste Lme puung it on the acLve
– Disk, lock, pipe, network socket, etc.
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AcLve Expired 139 138 137 100 101
139 138 137 100 101
Disk
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– No longer on any ac.ve or expired queue!
– AXer I/O completes, interrupt handler moves task back to acLve runqueue
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– On each clock Lck: current->time_slice-- – If Lme slice goes to zero, move to expired queue
– An unblocked task can use balance of Lme slice – Forking halves Lme slice with child
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– “nice” value: user-specified adjustment to base priority – Selfish (not nice) = -20 (I want to go first) – Really nice = +19 (I will go last)
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– And run first
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– Unlikely to use enLre Lme slice
– Go to front of line, run briefly, block on I/O again
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– Ex: GUI configures DVD ripping, then it is CPU-bound – Scheduling should match program phases
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– May not be opLmal
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– Dynamic priority is mostly determined by Lme spent waiLng, to boost UI responsiveness
– StaLc priority is a starLng point for dynamic priority – No maeer how “nice” you are (or aren’t), you can’t boost your “bonus” without blocking on a wait queue!
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CPU 0 CPU 1
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– Figuring out where to move tasks isn’t free
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– Busy CPUs shouldn’t lose Lme finding idle CPUs to take their work if possible
– Overhead to figure out whether other idle CPUs exist – Just have busy CPUs rebalance much less frequently
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– If worth it, lock the CPU’s runqueues and take them – If not, try again later
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– NUMA (Non-Uniform Memory Access) – Hyper-threading – MulL-core cache behavior
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CPU0 CPU1 CPU2 CPU3
Memory
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costs
CPU0 CPU1 CPU2 CPU3
Memory Memory
Node Node
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– Each leaf node contains a group of “close” CPUs
– Most rebalancing within the leaf – Higher threshold to rebalance across a parent
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CPU0 CPU1 CPU2 CPU3
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CPU0 CPU1 CPU2 CPU3
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– A few more transistors than Intel knew what to do with, but not enough to build a second core on a chip yet
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– 4 Logical CPUs – But only 2 CPUs-worth of power
– They will do much beeer on 2 different physical CPUs than sharing one physical CPU
– Less of a problem for threads in same program. Why?
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CPU0 CPU1 NUMA DOMAIN 1 NUMA DOMAIN 1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
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– Why? – More likely to keep data in cache
– E.g., cores on same chip are in one domain
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– Which: process, process group, or user id – PID, PGID, or UID – Niceval: -20 to +19 (recall earlier)
– Historical interface (backwards compaLble) – Equivalent to:
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– Beeer not be 0!
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– Unless real-Lme (more later), then just move to the end of the acLve runqueue
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