Robustness of Temporal Logic Specifications for Signals
Georgios Fainekos dissertation series - Part I Akshay Rajhans
ECE Department, CMU
SVC Seminar: Aug 21, 2008
Akshay Rajhans (ECE, CMU) Robustness of TL for signals SVC Seminar: Aug 21, 2008 1 / 42