Radiation Testing of Advanced Non-Volatile Memories Ted Wilcox - PowerPoint PPT Presentation

Radiation Testing of Advanced Non-Volatile Memories Ted Wilcox ted.wilcox@nasa.gov NASA Goddard Space Flight Center 1 To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019.

Acronyms • BER: Bit Error Rate Program • • CMOS: Complementary Metal-Oxide NVM: Non-Volatile Memory Semiconductor • nvSRAM: Non-volatile SRAM • COTS: Commercial Off The Shelf • QLC: Quad-level Cell • DRAM: Dynamic Random Access Memory • RBER: Raw Bit Error Rate • ECC: Error-Correcting Code • SBU: Single Bit Upset • EDAC: Error Detection and Correction • SEE: Single Event Effects • EEPROM: Electrically-Erasable Programmable • SEFI: Single Event Functional Interruption Read-Only Memory • SEU: Single Event Upset • FRAM: Ferroelectric RAM • SLC: Single-level Cell • GEO: Geostationary Earth Orbit • SRAM: Static Random Access Memory • LET: Linear Energy Transfer • SSD: Solid State Drive • MBU: Multiple Bit Upset • SSR: Solid State Recorded • MCU: Multiple Cell Upset • STT-MRAM: Spin-torque Transfer MRAM • MLC: Multi-level Cell • TID: Total Ionizing Dose • MRAM: Magnetoresistive RAM • TLC: Triple-level Cell • NAND: Not AND (Flash Technology) • UBER: Uncorrected Bit Error Rate • NEPP: NASA Electronics and Packaging To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019. 2

Outline • Non-Volatile Memory Technologies • Tests, Testability, and Facilities Of Use • Typical Memory Test Setups • Recent Radiation Results • Ongoing Testing & Future Plans To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019. 3

NVM Technology • Advanced Non-Volatile Memories Are: – Technologies or products used for long- and intermediate-term storage of data in a non-volatile storage cell – Typically used in • EEPROMs & nvSRAMs (serial, small, random access) • Solid-State Recorders (complex, large, sequential access) • Boot PROMs / MCU code memory (small, random access, hi-reliability) • Certain FPGAs and embedded applications • Embedded or DRAM-like NVM technologies are a collaborative effort with other NEPP tasks (scaled CMOS evaluation, DDR memories) NEPP’s focus here is technology evaluation To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019. 4

Common NVM Technologies (today…) NOR Flash NAND Flash FRAM • Electrical charge • Electrical charge • Ferroelectric orientation • Random Access • Seq Access • Random Access • Low Density • Highest Density • Low Density • Simple interface • Complex interfaces • Simple interfaces • Limited endurance • Very limited endurance • High endurance • Varied rad tolerance • Limited rad tolerance • Rad tolerant • Example Usage: • Example Application: FPGA configuration bulk data storage ReRAM, 3DXPoint, PCM, STT-MRAM CBRAM • Electron spin • Resistive memory • Random Access • Random Access • Lowest* Density • Lowest to Highest Density • Simple interfaces • Varied interfaces • Very high endurance • Very high endurance • Excellent rad tolerance • Excellent rad tolerance • Still developing… • Still developing…. To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019. 5

Common NVM Technologies (today…) NOR Flash NAND Flash FRAM • Electrical charge • Electrical charge • Ferroelectric orientation • Random Access • Seq Access • Random Access • Low Density • Highest Density • Low Density • Simple interface • Complex interfaces • Simple interfaces – NOW • Limited endurance • Very limited endurance • High endurance TESTING • Varied rad tolerance • Limited rad tolerance • Rad tolerant • Example Usage: • Example Application: FPGA configuration bulk data storage ReRAM, 3DXPoint, PCM, STT-MRAM CBRAM • Electron spin • Resistive memory • Random Access • Random Access • Lowest* Density – NOW • Lowest to Highest Density • Simple interfaces – NOW TESTING • Varied interfaces • Very high endurance TESTING • Very high endurance • Excellent rad tolerance • Excellent rad tolerance • Still developing… • Still developing…. To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019. 6

Common NVM Radiation Test Interests Memory Cell SEU Peripheral Circuitry TID Tolerance • Powered off state to isolate • Evaluate all operational modes SEFI from control circuitry • Powered on and • Irradiate in appropriate • Powered on and dynamic conditions (worse case? flight- operating dynamically tests to evaluate • Depends on like?) differences • Failure distributions, lot- underlying tech, but • Consider number of bits specific testing issues can reveal error relative to fluence signatures typical for • SBU vs. MBU, angular a memory type Single-Event Latchup effects, data pattern, etc • Powered on, static and dynamic Memory-Specific Hard • High voltage and temperature Failures Relative importance of • Focus on power supply and • Stuck bits each varies tremendously recovery, less on SEFI that will • Broken program/erase by technology and inevitably occur circuits application • Strongly dependent on fab process To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019. 7

Heavy Ion Testing Memory Cell SEU Peripheral Circuitry TID Tolerance • Powered off state to isolate • Evaluate all operational modes SEFI from control circuitry • Powered on and • Irradiate in appropriate • Powered on and dynamic conditions (worse case? flight- operating dynamically tests to evaluate • Depends on like?) differences • Failure distributions, lot- underlying tech, but • Consider number of bits specific testing issues can reveal error relative to fluence signatures typical for • SBU vs. MBU, angular a memory type Single-Event Latchup effects, data pattern, etc • Powered on, static and dynamic Memory-Specific Hard • High voltage and temperature Failures • Focus on power supply and Ideal • Stuck bits recovery, less on SEFI that will • Broken program/erase Helpful inevitably occur circuits • Strongly dependent on fab Not Useful process To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019. 8

Co-60 Irradiation Memory Cell SEU Peripheral Circuitry TID Tolerance • Powered off state to isolate • Evaluate all operational modes SEFI from control circuitry • Powered on and • Irradiate in appropriate • Powered on and dynamic conditions (worse case? flight- operating dynamically tests to evaluate • Depends on like?) differences • Failure distributions, lot- underlying tech, but • Consider number of bits specific testing issues can reveal error relative to fluence signatures typical for • SBU vs. MBU, angular a memory type Single-Event Latchup effects, data pattern, etc • Powered on, static and dynamic Memory-Specific Hard • High voltage and temperature Failures • Focus on power supply and Ideal • Stuck bits recovery, less on SEFI that will • Broken program/erase Helpful inevitably occur circuits • Strongly dependent on fab Not Useful process To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019. 9

Pulsed Laser Memory Cell SEU Peripheral Circuitry TID Tolerance • Powered off state to isolate • Evaluate all operational modes SEFI from control circuitry • Powered on and • Irradiate in appropriate • Powered on and dynamic conditions (worse case? flight- operating dynamically tests to evaluate • Depends on like?) differences • Failure distributions, lot- underlying tech, but • Consider number of bits specific testing issues can reveal error relative to fluence signatures typical for • SBU vs. MBU, angular a memory type Single-Event Latchup effects, data pattern, etc • Powered on, static and dynamic Memory-Specific Hard • High voltage and temperature Failures • Focus on power supply and Ideal • Stuck bits recovery, less on SEFI that will • Broken program/erase Helpful inevitably occur circuits • Strongly dependent on fab Not Useful process To be presented by Ted Wilcox at the 2019 NEPP Electronics Technology Workshop (ETW), NASA GSFC, Greenbelt, MD, June 17-20, 2019. 10