PXD6 matrix pretests Jelena Ninkovic for the HLL team PXD6 - - PowerPoint PPT Presentation

PXD6 matrix pretests

Jelena Ninkovic for the HLL team

PXD6 Production Status

Production was split before the 1st metal layer

• reduces risk
• accelerates finalization

Status of the first batch (4 wafers: 3 SOI+1ref):

• Processing finished
• Yield measured on the wafer level
• 3 wafers (2SOI+1ref) cut
• One wafer repaired

Status of the second batch (4 wafers: 3 SOI+1ref):

• Processing finished
• Yield measured on the wafer level
• 2 wafers repaired- matrix pretests ongoing

Status of the third batch (2 SOI wafers with DHP footprint):

• Processing done till Cu (last layer BCB)
• Yield measured on the wafer level
• Matrix pretests ongoing

metal_2

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metal_1 polySi_1 polySi_2 n bulk deep p deep n p+ n+ 2 EVO meeting 14.12.2011 Jelena Ninkovic

Automated pretesting of matrices

16 3

• Keep all transistors ON and measure I on each readout pad
• Numbers in the table show number of transistors are

connected (max number 16)

• Automatic measurement procedure was developed to measure

yield of matrices before bonding

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4 rows of readout pads For small matrices each pad has 16 transistors connected (128drains x 16gates)

Results of the pretests on Batch 1 before repair

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0 transistors connected 16 transistors connected

Cause of a problem

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Effect present only on wafers that have seen back side processing Analysis of process steps on the back side Photolithography on the backside: Front sides of the wafers were never protected during the photolithography steps on the back side During this process step wafer goes into developer For reference wafers this step takes ~30s whereas for etched SOI wafers the thickness of photoresists requires much longer times (~15min)  Developer was slowly etching Aluminum on the non protected side …

Can we repair it somehow ??

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metal_1 polySi_1 polySi_2 n bulk deep p deep n p+ n+

Deposit 3rd Al layer and structure it on top

• f an already existing extreme topology

Metal 3

Problems during the repair

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Poly Si Poly Si Al 1 Al 1 Al 2 Al2

Matrix pretests Batch 1 after repair

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0 transistors connected 16 transistors connected 32 transistors connected

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Matrix pretests Batch 2 after repair

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0 transistors connected 16 transistors connected 32 transistors connected

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Finished yesterday Yield of the measured matrices >99%

Matrix pretests Batch 3

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0 transistors connected 16 transistors connected

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Yield of all up to now measured matrices >98%

Thank you for your attention!

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