Power Device Physics Revealed TCAD for Power Device Technologies 2D - - PowerPoint PPT Presentation

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Power Device Physics Revealed TCAD for Power Device Technologies 2D - - PowerPoint PPT Presentation

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Power Device Physics Revealed TCAD for Power Device Technologies 2D and 3D TCAD Simulation Silvaco TCAD Background TCAD simulation leader since 1987 Power device 2D TCAD simulation leader since 1992 Power device 3D TCAD simulation

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SLIDE 1

Power Device Physics Revealed

TCAD for Power Device Technologies 2D and 3D TCAD Simulation

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SLIDE 2

Power Device Physics Revealed

  • 2 -

Silvaco TCAD Background

  • TCAD simulation leader since 1987
  • Power device 2D TCAD simulation leader since 1992
  • Power device 3D TCAD simulation leader since 1995
  • Over 90% market share of TCAD-using companies
  • Complete domination of TCAD university market share
  • Recognized by customers as providing excellent, timely,

worldwide local support

  • Compatible with TMA and ISE legacy software for easy migration

to SILVACO

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SLIDE 3

Power Device Physics Revealed

  • 3 -
  • 3 -

Comprehensive TMA Compatibility

  • SILVACO and TMA TCAD software share a common legacy

from Stanford University

  • ATHENA is T-Supreme4™ compatible
  • ATLAS is MEDICI™ compatible
  • This compatibility allows:
  • Direct loading of input deck syntax
  • Support for the same physical models
  • Use of the same legacy material parameters
  • Direct loading of TMA TIF format structure files
  • Sharing of users’ existing calibration coefficients

TMA Users can migrate to SILVACO software easily

T-Supreme4 and MEDICI are trademarks of Synopsys Inc

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SLIDE 4

Power Device Physics Revealed

Objectives of this Presentation

  • Presentation of simulation results for a wide range of power

device types

  • DC, AC, transient and breakdown voltage analysis
  • Application examples:
  • SiC Trench Gated MOS Transistor
  • SiC DMOS Transistor
  • GaN Schottky Diode
  • GaN FET
  • Insulated Gate Bipolar Transistor
  • LDMOS, UMOS
  • Merged PiN Schottky Power Diode
  • Vertical Double-Diffusion MOS Transistor
  • Guard Ring
  • 4 -
  • 4 -
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SLIDE 5

Power Device Physics Revealed

  • 5 -
  • 5 -

Application Examples

  • SiC Trench Gated MOS Transistor
  • SiC DMOS Transistor
  • GaN Schottky Diode
  • GaN FET
  • Insulated Gate Bipolar Transistor
  • LDMOS, UMOS
  • Merged PiN Schottky Power Diode
  • Guard Ring
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SLIDE 6

Power Device Physics Revealed

All Angle Implant SiC Models

  • Silvaco has developed and implemented extremely accurate

Monte Carlo model for 3 SiC polytypes. The development was initiated by a SiC customer in Japan NJRC in 2003. Final doping profiles in SiC are extremely sensitive to IMPLANT ANGLE, and unlike other TCAD vendors Silvaco can accurately simulate this effect.

  • 6 -
  • 6 -
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SLIDE 7

Power Device Physics Revealed

Doping Challenges for the SiC Technology

  • Ion implantation is the only practical selective-area doping

method because of extremely low impurity diffusivities in SiC

  • Due to directional complexity of 4H-SiC, 6H-SiC it is difficult ad-

hoc to minimize or accurately predict channeling effects

  • SiC wafers miscut and optimizing initial implant conditions to

avoid the long tails in the implanted profiles

  • Formation of deep box-like dopant profiles using multiple implant

steps with different energies and doses

  • 7 -
  • 7 -
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SLIDE 8

Power Device Physics Revealed

  • 8 -
  • 8 -

Measurement Verified Simulated Implant Profiles

Experimental (SIMS) and calculated (BCA simulation) profiles of 60 keV Al implantation into 4H-SiC at different doses(shown next to the profiles) for a) on-axis direction, b) direction tilted 17° of the normal in the (1-100) plane, i.e. channel [11-23], and c) a “random” direction - 9° tilt in the (1-100) plane (next slide.) Experimental data are taken from J. Wong-Leung, M. S. Janson, and B. G. Svensson, Journal of Applied Physics 93, 8914 (2003).

a) b)

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SLIDE 9

Power Device Physics Revealed

  • 9 -
  • 9 -

Measurement Verified Simulated Implant Profiles

Experimental (SIMS) and calculated (BCA simulation) profiles of 60 keV Al implantation into 4H-SiC at different doses(shown next to the profiles) for c) a “random” direction - 9° tilt in the (1-100) plane ((a) and (b) shown on previous slide.) Experimental data are taken from J. Wong-Leung, M. S. Janson, and B. G. Svensson, Journal of Applied Physics 93, 8914 (2003).

c)

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SLIDE 10

Power Device Physics Revealed

  • 10 -
  • 10 -

Measurement Verified Simulated Implant Profiles

Box profile obtained by multiple Al implantation into 6H-SiC at energies 180, 100 and 50 keV and doses 2.7 E15, 1.4E14 and 9E14 cm-2 respectively. The accumulated dose is cm-2. Experimental profile is taken from T. Kimoto, A. Itoh, H. Matsunami, T. Nakata, and M. Watanabe, Journal of Electronic Materials 25, 879 (1996).

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SLIDE 11

Power Device Physics Revealed

  • 11 -
  • 11 -

Measurement Verified Simulated Implant Profiles

Aluminum implants in 6H-SiC at 30, 90, 195, 500 and 1000 keV with doses of 3x1013, 7.9x1013, 3.8x1014, 3x1013 and 3x1013 ions cm-2 respectively. SIMS data is taken from S. Ahmed, C. J. Barbero, T. W. Sigmon, and J. W. Erickson, Journal of Applied Physics 77, 6194 (1995).

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SLIDE 12

Power Device Physics Revealed

  • 12 -
  • 12 -

Channeling Dependant Phosphorous Implantation

Simulation of tilt angle dependence of Phosphorus ion implantation into 4H-SiC at 50 keV.

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SLIDE 13

Power Device Physics Revealed

  • 13 -
  • 13 -

2D Monte Carlo Phosphorous Implantation into SiC

A typical 4H-SiC MESFET obtained by multiple P implants.

Deep implantation is possible

Multi-core computers significantly improve run times. This figure shows speedup achieved on 16 CPUs computer (Quad- Core AMD Opteron Processor 8356 x 4). The Well Proximity Effect was analyzed by running one million 300 keV Boron ion trajectories. 1 CPU: 6 h 40 min. vs 16 CPUs: 27 min.

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SLIDE 14

Power Device Physics Revealed

Nitrogen Monte Carlo Implant into 4H-SiC Trench

  • Tilted 20 degrees 25 keV

Nitrogen implant into 4H-SiC

  • trench. Simulation time for
  • ne million trajectories took

5 min

  • 14 -
  • 14 -
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SLIDE 15

Power Device Physics Revealed

  • 15 -

Stress Simulation

IV characteristics will be simulated taken into account the stress calculated in ATHENA Stress distribution in X-direction (principal current element)

Body(P) Source(N) Drift(N-) SiO2 GATE SOURCE Inversion layer

High compressive stress

The diagrams show stress effect formed during mask patterning after the RIE etching.

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SLIDE 16

Power Device Physics Revealed

Physical Models for SiC Device Simulation

  • Quadruple Precision for wide bandgap material
  • Very low intrinsic carrier density
  • Impurity-concentration-dependant mobility
  • High-field-dependant mobility
  • Interface state model (continuous TRAP in the band gap)
  • Schottky contact (Parabolic field emission model)
  • Self-heating effect
  • Anisotropic model
  • Mobility
  • Impact ionization (0001, 112b0 for ４H-SiC)
  • Permittivity
  • Thermal conductivity
  • 16 -
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SLIDE 17

Power Device Physics Revealed

Impurity-concentration-dependant Mobility Model

  • 17 -
  • Ref. W.J. Schaffer, G.H. et al, “Conductivity anisotropy in epitaxial 6H and 4H-SiC”,

Mat.Res.Soc.Sim., vol.339, 1994, pp.595-600

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SLIDE 18

Power Device Physics Revealed

  • 18 -

Impurity-concentration-dependant electron mobility and hole mobility of 1000-plane 4H-SiC Impurity-concentration-dependant electron mobility and hole mobility of 1100-plane 4H-SiC

Impurity-concentration-dependant Mobility Model

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SLIDE 19

Power Device Physics Revealed

  • 19 -

Field-dependant Mobility Model

Velocity-Field Characteristics for (0001) 6H-SiC for 23 C, 135 C, and 320 C, Simulated (solid lines), Experimental (symbols). Velocity-Field Characteristics for (0001) 4H-SiC for Room Temperature and 320 C, Simulated (solid lines), Experimental (symbols)

Imran A. Khan and James A. Cooper, "Measurement of High-Field Electron Transport in Silicon Carbide," IEEE

  • Trans. Electron Devices, Vol. 47, No. 2, pp. 269-273, February 2000.
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SLIDE 20

Power Device Physics Revealed

  • 20 -

Defect distribution

Ref) SiC & wide Gap Semiconductor Kennkyukai , p.15-16, 18th 2009

Definition of the continuous DEFECT distribution at the 4HSiC/ SiO2 interface.

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SLIDE 21

Power Device Physics Revealed

  • 21 -

Anisotropic Mobility Model - Planar Type

Structure and net doping

Body(P) Source(N) Substrate(N+) Drift(N-) SiO2 GATE SOURCE DRAIN

Id-Vd curve

Isotropic mobility <1100> Isotropic mobility <1000> Anisotropic mobility

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SLIDE 22

Power Device Physics Revealed

  • 22 -

Anisotropic Mobility Model – Trench Type

Structure and net doping

Body(P) Source(N) Substrate(N+) Drift(N-) SiO2 GATE SOURCE DRAIN

Isotropic mobility <1000> Isotropic mobility <1100> Anisotropic mobility

Id-Vd curve

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SLIDE 23

Power Device Physics Revealed

Temperature Dependence of Mobility

  • The impedance is

increasing as temperature is high due to the mobility model depend on the lattice temperature

  • 23 -

Id-Vd curve of SiC MOSFET for temperatures from -70 to 350℃.

  • 70℃

0℃ 27℃ 100℃ 200℃ 300℃ 350℃

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SLIDE 24

Power Device Physics Revealed

Schottky Diode Leakage Current Simulation

  • Quadruple precision simulation
  • 24 -

4H-SiC 1e16cm-3 Anode Cathode

Without Field Emission Model With Field Emission Model

Normal Precision Quadratic Precision

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SLIDE 25

Power Device Physics Revealed

pn Diode Breakdown Voltage Simulation

  • Quadruple precision simulation
  • 25 -

4H-SiC 1e15cm-3 Anode Cathode Normal Precision Quadratic Precision 1e19cm-3

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SLIDE 26

Power Device Physics Revealed

Breakdown Voltage Simulation

  • 4H-SiC Guard Ring Structure
  • 26 -

No guard ring With guard rings

p+ N p+ N

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SLIDE 27

Power Device Physics Revealed

  • 27 -

Breakdown Voltage Simulation

Breakdown Voltage depend on the number of the Guard Rings

Without GR

1D Planar Distribution voltage on each Guard Rings

1 2 3 4 5 6 7

Same Vb on 6 & 7 GRs

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SLIDE 28

Power Device Physics Revealed

  • 28 -

Breakdown Voltage Simulation

Impact Ionization + Current Flowlines None 2 rings 4 rings 6 rings 1 ring 3 rings 5 rings 7 rings Avalanche occur on the ideal position

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SLIDE 29

Power Device Physics Revealed

MixedMode Simulation

  • 29 -

IGBT1 IGBT2

SmartLib : share with SmartSpice, UTMOST, ATLAS

MOS, BJT, TFT, Diode.. Active Device Models

UTMOST SmartSpice

  • MixedMode
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SLIDE 30

Power Device Physics Revealed

MixedMode Simulation

  • 2IGBT+Di(SiC)
  • 30 -

IGBT1 IGBT2 Di(SiC)

R Vgate Vdd

IGBT1 IGBT2 Di(SiC)

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SLIDE 31

Power Device Physics Revealed

Application Examples

  • 31 -
  • 31 -
  • SiC Trench Gated MOS Transistor
  • SiC DMOS Transistor
  • GaN Schottky Diode
  • GaN FET
  • Insulated Gate Bipolar Transistor
  • LDMOS, UMOS
  • Merged PiN Schottky Power Diode
  • Guard Ring
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SLIDE 32

Power Device Physics Revealed

Physical Models for GaN FET Simulation

  • Automated calculation of Spontaneous and Piezo-Electric

Polarization

  • Automated calculation of Strain for the whole InAlGaN material

system

  • X and Y Composition Dependent Models for Bandgap, Electron

Affinity, Permittivity, Density of State Masses, Recombination, Impact Ionization, Heat capacity, Refractive Index, low and high field Mobilities

  • GaN specific Impact Ionization and Field / Temperature

Dependent Mobility Models

  • Phonon-assisted tunneling model
  • 32 -
  • 32 -
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SLIDE 33

Power Device Physics Revealed

Schottky Diode Application Example – Reverse IV Characteristics

  • Device Cross Section and Band Diagram of a n-GaN Schottky

Diode

  • 33 -
  • 33 -

Ref P.Pipinis et al, J Appl Physics, 99, 093709 (2006) Quasi Fermi Level Conduction Band Valence Band

n-GaN

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SLIDE 34

Power Device Physics Revealed

Schottky Diode Application Examples – Reverse IV Characteristics

  • Reverse I-V Characteristic of a n-GaN Schottky Diode Showing

Leakage Current due to Photon Assisted Tunneling versus Temperature

  • 34 -
  • 34 -

Ref P.Pipinis et al, J Appl Physics, 99, 093709 (2006)

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SLIDE 35

Power Device Physics Revealed

  • 35 -

Schottky Diode Application Examples – Reverse IV Characteristics

  • 35 -
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SLIDE 36

Power Device Physics Revealed

  • 36 -

FET Application Examples – IV Characteristics

  • 36 -

Id vs. Vgs characteristics suitable for Vt extraction. Id vs. Vds characteristics.

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SLIDE 37

Power Device Physics Revealed

  • 37 -

FET Application Examples – Optimizing Design

  • Non Ideal Breakdown Characteristics using Standard Gate Field

Plate Design. (Breaks down at 150 volts)

  • 37 -
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SLIDE 38

Power Device Physics Revealed

  • 38 -

FET Application Examples – Optimizing Design

  • After Optimizing Gate Field Plate Height and Over-Lap, a 600 volt

breakdown was obtained.

  • 38 -

A DOE can be created using ANY parameter in the input file since anything can be made a variable.

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SLIDE 39

Power Device Physics Revealed

  • 39 -

FET Application Examples – Self Heating Effects

  • For GaN FETs on Sapphire or Silicon Carbide Substrates, Self

Heating Effects are Significant. The slide below compares these effects on the resulting I-V and gm Curves

  • 39 -
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SLIDE 40

Power Device Physics Revealed

  • 40 -

FET Application Examples – Self Heating

  • Comparing IdVd Curves for a GaN FET on Sapphire and Silicon

Carbide Substrates respectively

  • 40 -

Sapphire SiC Substrate

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SLIDE 41

Power Device Physics Revealed

Objectives of this Presentation

  • Application Examples:
  • SiC Trench Gated MOS Transistor
  • SiC DMOS Transistor
  • GaN Schottky Diode
  • GaN FET
  • Insulated Gate Bipolar Transistor
  • LDMOS, UMOS
  • Merged PiN Schottky Power Diode
  • Guard Ring
  • 41 -
  • 41 -
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SLIDE 42

Power Device Physics Revealed

  • 42 -
  • 42 -

Simulation of an IGBT

IGBT Net Doping Collector Current vs. Collector Voltage

Drift (N-) Sub (P+) P N+

IcVc Curve of IGBT

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SLIDE 43

Power Device Physics Revealed

  • 43 -
  • 43 -

Simulation of an IGBT

Emitter Region Lattice Temperature & Current Flow. Lattice Temperature in the whole structure

This area has high electric field, so the lattice temperature increased

P P Drift (N-) Sub (P+) Drift (N-) N+

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SLIDE 44

Power Device Physics Revealed

  • 44 -
  • 44 -

Simulation of an IGBT

  • Curvetracer
  • Trace out complex IV curves (Latch-up, breakdown, snapback)
  • Dynamic Load Line Approach (Goosens et al., IEEE Trans CAD 1994,

13, pp. 310-317)

IGBT turn on as thyristor after the current reach to Latch-Up

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SLIDE 45

Power Device Physics Revealed

  • 45 -

Simulation of an IGBT

  • 45 -

Current Flow During IGBT Latch-up Collector Current and Lattice Temperature During Latch-up 1 2 3 4

1 2 3 4

The current flows after latch-up.

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SLIDE 46

Power Device Physics Revealed

Simulation of an IGBT

  • IGBT IcVce characteristics for temperatures from -70C to 300C
  • 46 -
  • 46 -

The impedance is increasing as temperature is high due to the mobility model depend on the lattice temperature.

Temp is increasing

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SLIDE 47

Power Device Physics Revealed

Simulation of a 5000V IGBT Breakdown Voltage

  • IGBT structure showing Electric field and potential distribution as

well as impact ionization rate

  • 47 -
  • 47 -

Electric Field Distribution Potential Distribution Impact Ionization Rate distribution

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SLIDE 48

Power Device Physics Revealed

  • 48 -

Simulation of a 5000V IGBT breakdown voltage

  • Breakdown simulation at different temperatures: 203K(-70C),

300K(27C) and 623K(350C)

  • 48 -

203K（-70℃） 300K（27℃）

Breakdown Voltage and leak current depend on the lattice temperature

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SLIDE 49

Power Device Physics Revealed

Simulation of a 5000V IGBT Breakdown Voltage

  • Breakdown simulation at different temperatures: 203K(-70C),

300K(27C) and 623K(350C)

  • 49 -
  • 49 -

623K（350℃）

Breakdown Voltage decreased due to the higher lattice temperature

623K 300K 203K

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SLIDE 50

Power Device Physics Revealed

Trench Type IGBT

  • Comparison of Planar Type vs Trench Type IGBT
  • Comparison of Threshold Voltage, breakdown voltage and saturation

voltage

  • Schematic Driven MixedMode for switching circuit performance

analysis

  • 50 -
  • 50 -
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SLIDE 51

Power Device Physics Revealed

  • 51 -
  • 51 -

IGBT Structures

  • IGBT structure of Planar

type (left) and Trench type (right)

N P N+ P N N+ SiO2 Inversion layer Inversion layer Drift (N-) Drift (N-) Emitter Gate Emitter Gate

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SLIDE 52

Power Device Physics Revealed

  • 52 -
  • 52 -

Doping Profile of IGBT (Trench)

  • 2D IGBT structure

(left) and 1D (right)

  • Doping profile along

A – A’

P P N+ Drift (N-) Drift (N-) Buffer (N) Sub (P+) Sub (P+) Buffer (N) N A’ A A A’ Emitter Gate Collector / cm3

slide-53
SLIDE 53

Power Device Physics Revealed

  • 53 -

Comparison of the Breakdown-voltage

  • Breakdown curve of

Planar type (Red) and Trench type (Green)

  • Same Breakdown

Voltage

Planar A/ mm2

Close Breakdown-voltage

V Trench

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SLIDE 54

Power Device Physics Revealed

  • 54 -

Comparison of the Threshold-voltage

  • Vge-Ic curves of Planar

type (Red) and Trench type (Green) at Vce=10V

  • Close Threshold Voltage

Planar Trench A/ mm2

Close Threshold-voltage

V

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SLIDE 55

Power Device Physics Revealed

  • 55 -

Comparison of the Saturation-voltage （ VCE(sat) ）

  • Vce-Ic curves of Planar

type (Red) and Trench type (Green) at Vgs=15V

  • VCE(sat) at Ic=10A/mm2

Planar : 3.15V Trench : 2.35V

Planar Trench A/ mm2 V

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SLIDE 56

Power Device Physics Revealed

  • 56 -

Switching Circuit Schematic with Inductor Load

  • Switching circuit of

Inductor for Fall- time measurement

  • Gateway driven

MixedMode simulation

  • FWD (Free Wheel

Diode) uses a Diode spice compact model

10Ω 300V 0→15V 1.5m H Physical Device Planar type Trench type vs

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SLIDE 57

Power Device Physics Revealed

  • 57 -

Comparison of Fall-time （ Tf ）

  • Switching curves of

Planar type (Red) and Trench type (Green) at 125℃.

  • Tf: ②‐①

at IcP = 2.5A/mm2

Planar : 510ns Trench : 470ns

Planar Trench IcP×0.9 ・・・① IcP×0.1 ・・・② IcP A/mm2 A/mm2 A B C s s Ic

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SLIDE 58

Power Device Physics Revealed

  • 58 -

Carrier Dependence on Switching Time (Trench)

  • Distribution of

Hole concentration during Switch-off

Buffer (N) Drift (N-) Sub (P +) Buffer (N) Drift (N-) Sub (P +) Buffer (N) Drift (N-) Sub (P +) Emitter Emitter Emitter Gate Gate Gate P P P N+ N+ N+ A B C

The tail current keeps flowing until the minority carrier (Hole) disappears

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SLIDE 59

Power Device Physics Revealed

  • 59 -

Figure of Merits

  • Tf vs VCE(sat) trade-off

curves of Planar type (Red) and Trench type (Green) at different carrier lifetimes

taun,p=1e-6s taun,p=2e-6s taun,p=6e-7s

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SLIDE 60

Power Device Physics Revealed

Application Examples

  • SiC Trench Gated MOS Transistor
  • SiC DMOS Transistor
  • GaN Schottky Diode
  • GaN FET
  • Insulated Gate Bipolar Transistor
  • LDMOS, UMOS
  • Merged PiN Schottky Power Diode
  • Guard Ring
  • 60 -
  • 60 -
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SLIDE 61

Power Device Physics Revealed

  • 61 -
  • 61 -

Simulation of a LDMOS Transistor

LDMOS Strucrture Gate Charging Simulation

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SLIDE 62

Power Device Physics Revealed

  • 62 -
  • 62 -

Simulation of a LDMOS Transistor

Capacitance @Vdrain=0V Capacitance @ Vdrain=1,5V

Cgg, Cgd @f=1MHz Cgg @f=1MHz

slide-63
SLIDE 63

Power Device Physics Revealed

  • 63 -

3D Buffered Super Junction LDMOS

  • 3D Process simulation done with VICTORY CELL showing Net

Doping Distribution

  • 63 -

Ref: IEEE circuits and Devices Magazine November/December 2006

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SLIDE 64

Power Device Physics Revealed

  • 64 -
  • 64 -

3D Buffered Super Junction LDMOS

2D cutline through n-region. 2D cutline through p-region.

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SLIDE 65

Power Device Physics Revealed

  • 65 -
  • 65 -

3D Buffered Super Junction LDMOS

Electric field distribution with 80 volts applied to the drain. Impact ionization rate distribution at 80 volts drain voltage.

slide-66
SLIDE 66

Power Device Physics Revealed

  • 66 -

3D Buffered Super Junction LDMOS

  • Super junctions are used in LDMOS to

greatly increase the breakdown voltage of small geometry devices. This example illustrate the effectiveness of this approach for an electrical gate length of 2.5um the breakdown voltage is 85V

  • 66 -

Ref: IEEE circuits and Devices Magazine November/December 2006

slide-67
SLIDE 67

Power Device Physics Revealed

  • 67 -

The figure shows the UMOS device which has the Polysilicon gate in the form of the trench with rounded bottom. In order to perform accurate device simulation it is extremely important to have very fine conformal grid along the

  • gate. The doping and grid

around the bottom of the gate are shown in the insert.

Simulation of a UMOS Transistor

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SLIDE 68

Power Device Physics Revealed

  • 68 -
  • 68 -

Simulation of a UMOS Transistor

slide-69
SLIDE 69

Power Device Physics Revealed

  • 69 -

Merged PiN Schottky Power Diode

  • 69 -

Net Doping Distribution Electric Field distribution

Ref: S.Musumeci et. al. "Modeling and Characterization of a Merged PiN Schottky Diode with Doping Compensation of the Drift Region", Industry Application Conference, 2004. 39th IAS Annual Meeting. Publication date: 3-7 Oct.2004 Volume 2, pp. 1244-1251

slide-70
SLIDE 70

Power Device Physics Revealed

  • 70 -

Merged PiN Schottky Power Diode

  • 70 -

Forward IV Characteristic Reverse Breakdown Characteristic

Ref: S.Musumeci et. al. "Modeling and Characterization of a Merged PiN Schottky Diode with Doping Compensation of the Drift Region", Industry Application Conference, 2004. 39th IAS Annual Meeting. Publication date: 3-7 Oct.2004 Volume 2, pp. 1244-1251

slide-71
SLIDE 71

Power Device Physics Revealed

  • 71 -
  • 71 -

Simulation of Guard Ring

Potential Distribution and Electric Field of the surface Guard Ring Breakdown Voltage and the Potential

  • f each Guard Ring
slide-72
SLIDE 72

Power Device Physics Revealed

  • 72 -

Summary

  • SILVACO meets all key TCAD simulation challenges for all

Power Device types in 2D and 3D

  • Need for wide temperature simulation range from -70C to

beyond 450C

  • Need for simulation and extraction of very high breakdown

voltages (600V, 1200V, 1700V, 5000V, 10000V) over wide temperature ranges

  • 2D and 3D stress simulation
  • 2D and 3D Monte Carlo ion implantation with special models

for SiC for ALL implant angles

  • 72 -