P4DNS: In-Network DNS Jackson Woodruff, Murali Ramanujam, Noa - - PowerPoint PPT Presentation

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P4DNS: In-Network DNS Jackson Woodruff, Murali Ramanujam, Noa Zilberman University of Cambridge September 23, 2019 1 / 9 Introduction Networks continue to increase bandwidths without achieving much latency reduction. Latency is

SLIDE 1

P4DNS: In-Network DNS

Jackson Woodruff, Murali Ramanujam, Noa Zilberman

University of Cambridge

September 23, 2019

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SLIDE 2

Introduction

◮ Networks continue to increase bandwidths without achieving much latency reduction. ◮ Latency is particularly important in data center networks. ◮ In-network computing brings network computation closer to it’s use. ◮ We develop P4DNS using P4→NetFPGA

◮ 52x throughput improvement and 100x latency reduction over NSD ◮ Identify areas where P4 is ill-suited for developing traditional applications on an FPGA.

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SLIDE 3

Data Center Network (us) Rack DNS Server Internet (ms) Data Center Network (us) Switch Machine 1 Machine 2 Machine 3 Machine 4 DNS Server

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SLIDE 4

Data Center Network (us) Rack DNS Server Internet (ms) Data Center Network (us) Switch + DNS Machine 1 Machine 2 Machine 3 Machine 4 DNS Server 4 / 9

SLIDE 5

Architecture

Data Plane (P4) + Control Plane (Python)

Data Plane Control Plane Packet Packet Checks Non DNS Request DNS DNS Request Host Processor DNS Response or Recursive Request Switch Output Packet

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SLIDE 6

Architecture

Data Plane (P4) + Control Plane (Python)

Data Plane Control Plane Packet Packet Checks Non DNS Request DNS DNS Request Host Processor DNS Response or Recursive Request Switch Output Packet

Ethernet IP UDP DNS DNS Request (64B) DNS Request (65B) Accept 5 / 9

SLIDE 7

Architecture

Data Plane (P4) + Control Plane (Python)

Data Plane Control Plane Packet Packet Checks Non DNS Request DNS DNS Request Host Processor DNS Response or Recursive Request Switch Output Packet

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SLIDE 8

Architecture: Control Plane

◮ Functionality:

◮ Recursive requests ◮ Cache updates ◮ TTL updates

◮ Multi-threaded python running on a CPU

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SLIDE 9

Design Lessons: Hardware for Traditional Protocols

◮ Control plane is a bottleneck:

◮ Protocols with mutable state tax this bottleneck.

◮ Existing protocols are designed for software:

◮ DNS uses C-style strings.

◮ String length is not clear until you have reached the last character.

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SLIDE 10

Design Lessons: Hardware for Traditional Protocols

◮ Control plane is a bottleneck:

◮ Protocols with mutable state tax this bottleneck.

◮ Existing protocols are designed for software:

◮ DNS uses C-style strings.

◮ String length is not clear until you have reached the last character.

But, partial implementations can work: ◮ P4DNS achieves 52x throughput improvement and 100x latency improvement.

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SLIDE 11

P4 on Hardware Limitations

◮ Field length limitations: 384 bits. ◮ Complex parsing state machines used excessive hardware resources on FPGAs.

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SLIDE 12

P4 on Hardware Limitations

◮ Field length limitations: 384 bits. ◮ Complex parsing state machines used excessive hardware resources on FPGAs.

Ethernet IP UDP DNS DNS Request (64B) DNS Request (65B) Accept

◮ For many applications, a simple bitstream is enough ◮ FPGAs remove some advantages (recursion) of state machines.

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SLIDE 13

Conclusion

◮ We implemented P4DNS, a DNS accelerator integrated into a P4 switch using P4→NetFPGA. ◮ We demonstrated potential for large performance improvement without changing existing protocols. ◮ But P4 is not without limitations for hardware targets.

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