Operating Systems Real-Time POSIX TinyOS Standard of UNIX - - PDF document

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Operating Systems Real-Time POSIX TinyOS Standard of UNIX - - PDF document

Jun 21, 2023 481 likes •545 views

Operating Systems Real-Time POSIX TinyOS Standard of UNIX Real-time POSIX Supported by many operating systems Real-time schedulability analysis Variants of UNIX Linux Many commercial RTOS, e.g., VxWorks

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SLIDE 1

Chenyang Lu CSE 467S 1

Operating Systems

  • TinyOS
  • Real-time POSIX
  • Real-time schedulability analysis

Chenyang Lu CSE 467S 2

Real-Time POSIX

  • Standard of UNIX
  • Supported by many operating systems
  • Variants of UNIX
  • Linux
  • Many commercial RTOS, e.g., VxWorks
  • Windows provides similar services

Chenyang Lu CSE 467S 3

To Be Covered

  • Supervisor mode
  • Process management
  • Scheduling
  • Race condition

Chenyang Lu CSE 467S 4

Supervisor mode

  • On processors with supervisor mode, you can do the

following only in supervisor (kernel) mode

  • Execute privileged instructions and access special hardware
  • Set real-time priority
  • Device driver
  • Access to a separate address space (the kernel space)
  • This is the mode in which the operating system usually runs.
  • Provide protective barriers between programs.
  • Prevent applications from corrupting OS data.

Chenyang Lu CSE 467S 5

Supervisor Mode (2)

  • Careful about memory access (e.g.,

pointers) when

  • programs run in supervisor mode
  • Or processor has no supervisor mode
  • Support supervisor mode?
  • SHARC, ATMEL: No
  • Pentium, ARM: Yes

Chenyang Lu CSE 467S 6

ARM supervisor mode

  • Use SWI instruction to enter

supervisor mode, similar to subroutine:

SWI CODE_1

  • Sets PC to 0x08.
  • Argument to SWI is passed to

supervisor mode code.

  • Saves CPSR in SPSR.
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SLIDE 2

Chenyang Lu CSE 467S 7

Trap

  • Trap (software interrupt): an exception

generated by an instruction.

  • Ex. enter supervisor mode.
  • Ex. call a service routine
  • ARM uses SWI instruction for traps.
  • SHARC offers three levels of software

interrupts.

  • Called by setting bits in IRPTL register.

Chenyang Lu CSE 467S 8

Exception

  • Exception: internally detected error.
  • Exceptions are caused by instruction

execution

  • unpredictable
  • Build on top of interrupt mechanism.
  • Exceptions are usually prioritized and

vectorized.

Chenyang Lu CSE 467S 9

Terms

  • Interrupt: generate by external devices
  • Exception: generate by CPU due to

software errors

  • Ex. div by 0
  • Trap: generate by software using

instructions (enter supervisor mode:

  • pen file, read from network etc.)

Chenyang Lu CSE 467S 10

Processes in POSIX

  • Create a process

with fork:

  • parent process keeps

executing old program;

  • child process

executes new program. process a process a process b

Chenyang Lu CSE 467S 11

fork()

The fork process creates child:

childid = fork(); if (childid == 0) { /* child operations */ } else { /* parent operations */ }

Chenyang Lu CSE 467S 12

execv()

  • Overlays child code:

childid = fork(); if (childid == 0) { execv(“mychild”,childargs); perror(“execv”); exit(1); } file with child code

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SLIDE 3

Chenyang Lu CSE 467S 13

Process State

  • A process can be in
  • ne of three states:
  • executing on the

CPU;

  • ready to run;
  • waiting for data.

executing ready waiting blocked unblocked preempted gets CPU Scheduler

Chenyang Lu CSE 467S 14

Process Management

  • OS keeps track of
  • process priorities;
  • scheduling state;
  • process activation record.
  • Processes may be created:
  • statically before system starts;
  • dynamically during execution.
  • OS controls when contexts switches

and what process runs.

Chenyang Lu CSE 467S 15

Priority-based Scheduling

  • Every process has a priority.
  • CPU goes to the highest-priority active process
  • Categories
  • Fixed vs. dynamic priority
  • Preemptive vs. non-preemptive

Chenyang Lu CSE 467S 16

Preemptive Fixed-Priority Scheduling

Example

  • Each process has a fixed priority (1 is the

highest);

  • T1: priority 1, execution time 10
  • T2: priority 2, execution time 30
  • T3: priority 3, execution time 20

Chenyang Lu CSE 467S 17

Preemptive Fixed Priority Scheduling

Example (cont.)

time T2 ready T1 ready T3 ready 30 10 20 60 40 50 P2 P2 P1 P3

Chenyang Lu CSE 467S 18

Preemptive Fixed Priority Scheduling

  • Widely supported by existing RTOS
  • POSIX standard
  • Real-time priorities in POSIX, Linux, Solaris, and

Windows

  • Most RTOS: VxWorks…
  • Priority is not the only possible mechanism
  • Clock-driven scheduling
  • Reservation-based scheduling
  • Proportional share scheduling
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SLIDE 4

Chenyang Lu CSE 467S 19

Real-Time Scheduling

  • What’s the best scheduling algorithm

for a workload?

  • Can we meet all deadlines?
  • How much CPU horsepower do we need

to meet our deadlines?

Chenyang Lu CSE 467S 20

Terminology

  • Task
  • usually corresponds to a process or thread
  • may be released multiple times
  • Periodic task
  • Ideal: inter-arrival time = period
  • General: inter-arrival time >= period
  • Aperiodic task
  • Inter-arrival time does not have a lower bound
  • Job: an instance of a task

Chenyang Lu CSE 467S 21

Timing Parameters

  • Task Ti
  • Start time
  • Period: pi
  • Worst-case execution time: ci
  • Relative deadline: di
  • Job Jik
  • Release time: time when process becomes ready
  • Finish time
  • Response time rik = Finish time – Release time
  • Absolute deadline = Release time + di

Chenyang Lu CSE 467S 22

Deadline Miss

  • A job misses its deadline if
  • response time > relative deadline
  • finish time > absolute deadline
  • What happens if a job misses its deadline?
  • Hard deadline: system fails if missed.
  • Soft deadline: user may notice, but system doesn’t

necessarily fail.

Chenyang Lu CSE 467S 23

Embedded vs. General-purpose Systems

  • General-purpose systems
  • e.g., PCs, database servers
  • Fairness to all tasks (no starvation)
  • Optimize throughput
  • Optimize average performance
  • Embedded systems
  • Meet all deadlines.
  • Fairness or throughput is not important
  • Hard real-time: worry about worst case

performance

Chenyang Lu CSE 467S 24

Metrics for Scheduling Algorithms

  • Ability to satisfy all deadlines.
  • A task set is schedulable under a

scheduling algorithm if all jobs can meet their deadlines

  • Run-time overhead: time required for

scheduling decision and context witch.

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SLIDE 5

Chenyang Lu CSE 467S 25

Operating Systems

  • TinyOS
  • Real-time POSIX
  • Real-time schedulability analysis

Chenyang Lu CSE 467S 26

Benefit of Scheduling Analysis: Case Study

105 “I mplementation” 20 Timing test √ 1 Scheduling analysis - DM/ Offset √ 345 Total composition time 172 Total composition time 105 I mplementation – two processors 90 Design - two processors 25 Design - two processors 30 Timing test × 1 Scheduling analysis - MUF × 75 I mplementation – one processor 25 Design – one processor 40 Design – one processor Baseline (Boeing) VEST (UVA)

  • Schedulability analysis reduces composition time by 50%!
  • Reduce wasted implementation/testing rounds
  • Analysis time <<< testing
  • More reduction expected for more complex systems

→Quick exploration of design space!

J.A. Stankovic, et. al., "VEST: An Aspect-Based Composition Tool for Real-Time Systems," RTAS 2003.