multi functional nanodevices
play

multi-functional nanodevices for bio- inspired computing Julie - PowerPoint PPT Presentation

multi-functional nanodevices for bio- inspired computing Julie Grollier - CNRS/Thales lab, Palaiseau, France NanoBrain UM CNRS/Thales Condensed matter physics laboratory High Tc Superconductors Spintronics and Nanomagnetism


  1. multi-functional nanodevices for bio- inspired computing Julie Grollier - CNRS/Thales lab, Palaiseau, France NanoBrain

  2. UM  CNRS/Thales Condensed matter physics laboratory • High Tc Superconductors • Spintronics and Nanomagnetism • Functional Oxides  nanodevices for bio- inspired computing memristors and more … J. Grollier Hipeac New Tech Talk 2013 1

  3. Acknowledgements • CNRS/Thales spintronic team: André Chanthbouala, Joao Sampaio, Steven Lequeux, Peter Metaxas, Nicolas Locatelli, P. Bortolotti, Madjid Anane, Cyrile Deranlot, Albert Fert, Vincent Cros • CNRS/Thales oxide team: André Chanthbouala, Agnès Barthélémy, Manuel Bibes, Vincent Garcia, Karim Bouzehouane, Sören Boyn, Flavio Bruno, Cécile Carretero, Ryan Chérifi, Stéphane Fusil, Stéphanie Girod, Eric Jacquet, Hiro Yamada • University of Cambridge: Neil Mathur, Xavier Moya • AIST, Japan: Rie Matsumoto, Akio Fukushima, Kay Yakushiji, Hitoshi Kubota, Shinji Yuasa J. Grollier Hipeac New Tech Talk 2013 2

  4. Multi-functional nanodevices Images : courtesy Stéphanie Girod Complex functions at the nanoscale Renewed interest in bio-inspired architectures example: Memristors vs. Artificial Neural Networks J. Grollier Hipeac New Tech Talk 2013 3

  5. Outline 1. introduction to memristors 2. memristors as artificial nano-synapses 3. purely electronic memristors J. Grollier Hipeac New Tech Talk 2013 4

  6. Memristor definition Memory - resistor v = M(q) i Chua, IEEE Trans. Circuit Theory (1971) R OFF resistive switching ON V V th - Nano resistance - Non volatile - Tunable (multi-resistance states) - Non-linear ( V th ) J. Grollier Hipeac New Tech Talk 2013 5

  7. An example: TiO 2 memristor (Hewlett-Packard) migration of oxygen vacancies V Pt TiO 2 Pt TiO 2-x Pt TiO 2 Pt R OFF Pt TiO 2-x Pt x (t) L 0    x x R ON     R R R 1 ON OFF   L L < 30x30 nm 2 ionic displacement proportional to the charge R OFF /R ON > 1000 x  R  q q Strukov et al., Nature 2008 Yang et al., Nature Nano (2008) J. Grollier Hipeac New Tech Talk 2013 6

  8. memristor crossbar arrays memory architecture : - memory element (nanodevice) - selector (diode, transistor) limiting element memristors : small (< 50 x 50 nm 2 ) + large OFF/ON ratio (>1000) HP  possibility to remove selector  build ultra-dense resistive matrices of memristors (crossbars) J. Grollier Hipeac New Tech Talk 2013 7

  9. memristor co-integration with CMOS CMOL concept « 4D » version (stacked crossbars) Strukov and Likharev, Nanotechnology 2005 Strukov and Williams, PNAS 2009 not many experimental implementations to be solved : cross-talk, sneak paths, lithography, thermal issues Xia et al., Nanoletters (2010) J. Grollier Hipeac New Tech Talk 2013 8

  10. Application 1 : non-volatile digital memories Resistive RAM under development (1T-1R)  target : replace DRAM • should be commercialized soon  2014 HP/Hynix, Elpida memory Inc., Panasonic… • performances (today) ReRAM NAND Flash DRAM 10 6 cycles 10 5 cycles 10 16 cycles endurance write speed 10 ns 100 µs 100 ns write energy best projected : 0.02 fJ 0.2 fJ 5 fJ • can be scaled below 20 nm (but selector issue) J. Grollier Hipeac New Tech Talk 2013 9

  11. Application 2 : logic with memory If the OFF/ON ratio is large enough (>> 10 3 ), memristors could be used as latches, replacing transistors - logic functions IMP Kuekes et al., JAP 2005 Borghetti et al., Nature 2010 Robinett et al., Nanotechnology 2010 Hasegawa et al., Adv. Mater. 2012 - Reconfigurable Architectures (Field Programmable Gate Arrays) Strukov and Likharev, Nanotechnology 2005 CMOL FPGA Snider et al., Nanotechnology 2007 Field Programmable Nanowire Interconnect J. Grollier Hipeac New Tech Talk 2013 10

  12. Application 3 : artificial nano-synapses R OFF - Non volatile memristors - Analog & Tunable - Nano ON V  1 memristor can mimic 1 biological synapse Interest from the device point of view: - takes full advantage of the device possibilities - stays away from Boolean logic (realm of CMOS)  could be the key to the future developments of hardware Artificial Neural Netwoks J. Grollier Hipeac New Tech Talk 2013 11

  13. Outline 1. introduction to memristors 2. memristors as artificial nano-synapses 3. purely electronic memristors J. Grollier Hipeac New Tech Talk 2013 12

  14. Why hardware neuromorphic architectures ? - Multicore scaling Semiconductor - Excessive dissipation industry hurdles : - Defects - Fast - Massively parallel - Low energy demand - Analog - Defect tolerant - Relatively uniform Artificial Neural Networks algorithms: - very performant (deep networks) - key applications : « Recognition, Mining and Synthesis » Temam, ISCA 2010 Chen, Temam et al. IISWC 2012 P. Dubey, Tech. Intel Magazine 2005 J. Grollier Hipeac New Tech Talk 2013 13

  15. Artificial Neural Networks / Memristors Neuron : - processing unit - integrates information sent from other neurons through synapses threshold - Spikes when threshold reached - « integrate and fire » 1 Synapse : - define how well the information is w 1 transmitted : synaptic weight 2 w 2 - the weigths are adjustable (synaptic w 3 plasticity) 3 w 1 and w 3 reinforced - all synapses : network memory Network performances : outputs inputs - interconnectivity x j (human brain 10 4 synapses / neuron) x i - scale of the network synapse w ij neuron J. Grollier Hipeac New Tech Talk 2013 14

  16. CMOS implementation : neuron ~ 100 µm Zamarreño-Ramos et al., Frontiers in Neuroscience 2011  huge number of transistors and passive elements J. Grollier Hipeac New Tech Talk 2013 15

  17. CMOS implementation : synapse 1) Store synaptic weights : 2) Synaptic plasticity: SRAM banks learning rule STDP plasticity  10 µm SRAM banks Schemmel et al., IJCNN 2006 J. Grollier Hipeac New Tech Talk 2013 16

  18. 1 memristor = 1 nano-synapse Chua, IEEE Trans. Circuit Theory (1971) Memory - resistor v = M(q) i Strukov et al., Nature 2008 - Nano resistance - Non volatile - Tunable (multi-resistance states) - Non-linear ( V th ) 1) Store synaptic weights : 2) Synaptic plasticity: non-volatile tunable R OFF STDP ON < 30x30 nm 2 V Linarres-Barranco et al., Frontiers Neuro, 2011 Jo et al., Nanoletters 2010 J. Grollier Hipeac New Tech Talk 2013 17

  19. supervised learning  the way traditional neural networks work the correct answer is known, the network is trained to produce it  neurons = state neurons (no spikes) R OFF  The memristor conductance is modified by applying the required voltage ON V very small (< 10 memristors) prototypes of perceptrons with memristive synapses Agnus et al, Adv Mat 2010 Alibart , Strukov et al, to be published J. Grollier Hipeac New Tech Talk 2013 18

  20. unsupervised learning  the neural networks learns by itself  memristors can implement an unsupervised learning rule : spike timing dependent plasticity , inspired from biology  neurons = spiking neurons Bi & Poo 1998 Jo et al., Nanoletters 2010 J. Grollier Hipeac New Tech Talk 2013 19

  21. STDP with memristors: simulations Strengthened synapse Weakened synapse Presented input Activated neuron Querlioz et al, IEEE IJCNN 2011 Bichler et al, Neural Networks, 2012  IEF/CEA List : the system autonomously learns to recognize the handwritten digits or to count vehicles J. Grollier Hipeac New Tech Talk 2013 20

  22. Artificial Neural Networks : applications Hardware ANNs : good at certain tasks Classical architectures : good at other tasks • Hybrid architectures Von Neumann / ANN  heterogenous multi-core, embedded applications  Goal : accelerating specific tasks  example : digital camera, accelerate smile recognition • Large scale hardware simulations of the human brain ?  faster and less power consumption than supercomputer simulations  Goal : understanding the human brain  European Projects FACETS/Brainscales & Human Brain flagship project and others J. Grollier Hipeac New Tech Talk 2013 21

  23. Outline 1. introduction to memristors 2. memristors as artificial nano-synapses 3. purely electronic memristors J. Grollier Hipeac New Tech Talk 2013 22

  24. Many different kinds of memristors After (and even before) Hewlett-Packard TiO 2 memristor was proposed, many other very different memristor concepts were identified : Erokhin et al., Surface and thin films (2007) PANI A.A. Zakhidov et al., Organic elec. (2009) metal/mixed conductor/metal F. Alibart et al., Advanced Func. Mater. (2009) Pentacene + gold particles Ben Jamaa et al., IEEE Nano (2009) Poly-cristalline Si nanowires Derycke et al., TNT (2009) Carbone nanotubes Driscol et al., APL (2009) Phase change material Gergel et al., IEEE EL (2009) flexible TiO 2 Jo et al., Nanoletters (2009) Ag/Si Wang et al., IEEE EL (2009) spintronics Kim et al., Nanoletters (2009) nanoparticle assemblies Jeong et al., Nanoletters (2010) graphene Lee et al., Nature Materials (2011) Ta 2 O 5 Ohno et al., Nature Materials (2011) atomic switches Chanthbouala, Grollier et al., Nature Physics (2011) spintronics Cavallini et al., Advanced Materials (2012) silicon oxide Chanthbouala, Grollier et al., Nature Materials (2012) ferroelectricity ……….. J. Grollier Hipeac New Tech Talk 2013 23

Download Presentation
Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend


More recommend