Memory-Stacking for Future High-Performance Microprocessor Yuan Xie - - PDF document
MDL@PSU Memory-Stacking for Future High-Performance Microprocessor Yuan Xie Pennsylvania State University
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IEEE Micro 07/2010
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Ideal case (all memory on-package)
Average performance improvement ~60%
Static mapping
When meeting the application footprint (<1GB)
= ideal case
When not, it is still comparable to the case of
1GB L4 cache
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