Memory Philipp Koehn 9 September 2019 Philipp Koehn Computer - - PowerPoint PPT Presentation

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Memory Philipp Koehn 9 September 2019 Philipp Koehn Computer - - PowerPoint PPT Presentation

Memory Philipp Koehn 9 September 2019 Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019 D-Type Level-Triggered Latch 1 DATA AND Q NOR NOT CLOCK Q NOR AND Philipp Koehn Computer Systems Fundamental: Memory 9


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SLIDE 1

Memory

Philipp Koehn 9 September 2019

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 2

1

D-Type Level-Triggered Latch

Q Q DATA

NOT

AND AND NOR NOR

CLOCK

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 3

2

Slightly Modified

DATA OUT DATA IN

NOT

AND NOR NOR

WRITE

AND Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 4

3

Operations

  • Circuit latches on one bit of memory and keeps it around
  • Truth table

Data-In Write Data-Out 1 1 1 1 X Data

  • Can write 1 bit and read content

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 5

4

multi-bit storage

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 6

5

1 Bit Memory

DATA OUT DATA IN

NOT

AND NOR NOR

WRITE

AND Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 7

6

8 Bit Memory

DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W WRITE DATA OUT DATA IN

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 8

7

Output Selector

  • 8 Bit Latch contains 8 bits
  • Now:
  • nly read 1 bit at a time
  • Select the bit with an address
  • Input:

address

  • Output:

bit value

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 9

8

Output Selector

DATA IN DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W WRITE 8-Bit Selector ADDRESS OUT

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 10

9

Output Selector

  • Truth table

Address Output A2 A1 A0 OUT D0 1 D1 1 D2 1 1 D3 1 D4 1 1 D5 1 1 D6 1 1 1 D7

  • What Boolean operation returns the correct value for address 000?

(NOT A2) AND (NOT A1) AND (NOT A0) AND D0

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 11

10

Output Selector

  • Full Boolean formula

( (NOT A2) AND (NOT A1) AND (NOT A0) AND D0 ) OR ( (NOT A2) AND (NOT A1) AND A0 AND D1 ) OR ( (NOT A2) AND A1 AND (NOT A0) AND D2 ) OR ( (NOT A2) AND A1 AND A0 AND D3 ) OR ( A2 AND (NOT A1) AND (NOT A0) AND D4 ) OR ( A2 AND (NOT A1) AND A0 AND D5 ) OR ( A2 AND A1 AND (NOT A0) AND D6 ) OR ( A2 AND A1 AND A0 AND D7 )

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 12

11

Output Selector

AND AND AND AND AND AND AND AND

A0 A1 A2 D7 D6 D5 D4 D3 D2 D1 D0

OR

DATA OUT

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 13

12

Input Decoder

  • 8 Bit Latch allows 8 bits to be written at the same time
  • Now:
  • nly write 1 bit at a time
  • Select the bit with an address
  • Input

– address – write flag – data bit

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 14

13

Input Decoder

DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DATA IN DATA OUT ADDRESS WRITE 3-to-8 Decoder

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 15

14

Input Decoder

  • Truth table

Address Output A2 A1 A0 W7 W6 W5 W4 W3 W2 W1 W0 WRITE 1 WRITE 1 WRITE 1 1 WRITE 1 WRITE 1 1 WRITE 1 1 WRITE 1 1 1 WRITE

  • What Boolean operation returns the correct value for output W0?

(NOT A2) AND (NOT A1) AND (NOT A0) AND WRITE

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 16

15

Input Decoder

A0 A1 A2 W0 WRITE

AND AND AND AND AND AND AND AND

W1 W2 W3 W4 W5 W6 W7

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 17

16

8 Bit RAM

DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DI DO W DATA IN 8-Bit Selector DATA OUT ADDRESS WRITE 3-to-8 Decoder

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 18

17

8 Bit RAM

  • 8 Bit Random Access Memory (RAM)
  • Input

– address – write flag – data bit

  • Output

– data bit

DI DO W 8x1 Bit RAM A

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 19

18

8x2 Bit RAM

  • 8x1 bit RAM allows read/write of 1 bit at a time
  • What if we want to read/write 2 bits at a time?

(and ultimately 8 bits (1 byte) and more) ⇒ Arrange them together

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 20

19

8x2 Bit RAM

DI DO W 8x1 Bit RAM A DI DO W 8x1 Bit RAM A DATA-OUT1 DATA-OUT0 DATA-IN0 DATA-IN1 ADDR WRT

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 21

20

8x2 Bit RAM

DI DO W A 8x2 Bit RAM

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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8x2 Bit RAM

DI DO W A 8x2 Bit RAM

3 2 2

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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22

64 KB RAM

DI DO W A 64Kx8 Bit RAM

16 8 8

  • 64KB = 65,536 bytes
  • 16 bit address space (216 = 65536)
  • Common memory size in the 1980s:

we will use it with 6502 assembly

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 24

23

Control Panel

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 25

24

Memories

Early 1980s: 64 KB RAM, 16 bit address space

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019

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SLIDE 26

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Bigger Memories

  • Early 1980s:

16 bit address space, up to 64 KB

  • 1990s:

32-bit address space, up to 4 GB

  • Today:

64-bit address space, up to 16 EB (exa-byte)

  • Actually supported by Intel/AMD 64-bit processors

– 52 bits for physical memory: 4 peta-byte – 48 bits for virtual memory: 256 tera-byte

  • Actually existing RAM: my lab biggest RAM machine:

768 GB (doubles every ∼2 years)

Philipp Koehn Computer Systems Fundamental: Memory 9 September 2019