MachineArchitecture CS217 Fall2001 1 ComputerOrganization MBus - - PDF document

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Fall2001 1

MachineArchitecture

CS217

Fall2001 2

ComputerOrganization

Control Unit Cache

R e g i s t e r s

ALU FPU CPU Memory Disk Net Display MBus I/OBus

Fall2001 3

MemoryHierarchy

• Registers

~128,1-5nsaccesstime(CPUcycletime)

• Cache

1KB– 4MB,20-100ns(multiplelevels)

• Memory

64MB– 1GB,200ns

• Disk

1GB– 20GB,10ms

• Long-termStorage

1TB,1-10s

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Fall2001 4

SourcetoBinary

• Sourcecodeinsomehigh-levellanguage

x=a+b;

• Assemblylanguage

lda,%r1 ldb,%r2 add%r1,%r2,%r3 st %r3,x

• Machinelanguage

32-bitinstructions(bitpatterns)executedbythemachine

Fall2001 5

InstructionFormats

• Eachmachineinstructioniscomposedof…
• pcode:operationtobeperformed
• perand(s):datathatisoperatedupon
• Eachmachinesupportsafewformats…
• pcode
• pcodedst
• pcodesrcdst
• pcode src1src2dst

Fall2001 6

InstructionExecution

• CPU’scontrolunitexecutesaloop

fetch:fetchatPC;incrementPC decode:interpretinstructionformat

• perandfetch:loadoperandsintoregisters

execute:performinstructionopcode store:writeresultstomemory

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Fall2001 7

AddressingMemory

• 8-bitbyteisthesmallestaddressableunit
• 32-bitaddresses;thus32-bitaddressspace
• Doubleword too
• Sparc isbig-endian

A A A+1 A+2 A+3 A A+1

7 15 31

byte halfword word

Fall2001 8

SparcRegisters

• 32x 32-bitgeneral-purposeregisters

%r0…%r31

• Registermap

%g0…%g7%r0…%r7global %o0…%o7%r8…%r15output %l0…%l7%r16…%r23local %i0…%i7%r24…%r31input

• Someregistershavededicateduses

%sp(%r14,%o6)stackpointer %fp (%r30,%i6)framepointer %r15 temporary %r31 returnaddress %g0(%r0)always 0

Fall2001 9

SparcRegisters(cont)

• Special-purposeregisters

manipulatedbyspecialinstructions floatingpointregisters(%f0…%f31) programcounter (PC) nextprogramcounter (nPC) PSR,TBR,WIM,Y

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Fall2001 10

SparcInstructionSet

• Instructiongroups

load/storeinstructions integerarithmeticandbit-wiselogicalinstructions controltransferinstructions specialinstructions(usedbyOS) floatingpointarithmetic

Fall2001 11

InstructionSet(cont)

• Format1(op=1):call
• Format2 (op=0): sethiandbranches
• p

disp30

31 29

• p

rd

• p2

imm22

• p a

cond

• p2

disp22

31 29 28 24 21

Fall2001 12

InstructionSet(cont)

• Format3(op=2or 3):remaininginstructions
• p

rd

• p3

rs1

31 29 24 18

• pf

rs2

• p

rd

• p3

rs1 simm13

13

1

12 4

• p

rd

• p3

rs1 asi rs2

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Fall2001 13

AssemblyvsMachineLanguage

• Machinelanguageisthebitpatterns that

representinstructions

• Assemblylanguageisasymbolic

representation ofmachinelanguage

• Assemblerstranslatefromassemblyto

machinelanguage

mappingis1-to-1

• Compilersmapfromsourcetoassembly

mappingis1-to-many

Fall2001 14

AssemblyvsMachine(cont)

• Example

add%i1,360,%o2 10010100000001100110000101101000

31 29 24 18

2

12 31 550

13

1

12

2

10 25 360 1 (decimal) (octal)

Fall2001 15

AddressingModes

• Twomodestoyieldeffectiveaddress

– addcontentsoftworegisters

ld[%o1],%o2registerindirect st %o1,[%o2,%o3]registerindexed

– addcontentsofregisterandimmediate

ld[%o1+10],%o2basedisplacement

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Fall2001 16

AddressingModes(cont)

• Assemblylanguagesyntax

Address Synonym regreg +%g0 reg +reg reg +N N +regreg+N N %g0+N

where Nisa13-bit,signed,integerconstant